IP Library Granted Patent US 9,673,710
Granted Patent B2
US 9,673,710 · App. 15/174,881 · Granted Jun 6, 2017

Voltage regulator current load sensing

Inventors: Hassan Ihs (San Diego, CA); Jason Rau (San Diego, CA)
H02M3/158H02M1/08H02M3/157H02M2001/0009
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Quick Facts
Patent No.
US 9,673,710
App. No.
15/174,881
Granted
Jun 6, 2017
Kind
B2
Abstract

A DC-DC converter including digital circuitry for determining load current supplied to a load. In some embodiments the digital circuitry determines the load current differently based on whether the DC-DC converter is operating in pulse frequency modulation mode or pulse width modulation mode. In some embodiments the DC-DC converter includes circuitry for determining if a short circuit or over current condition exists.

Claims (28)

1. A DC-DC converter comprising:

a high side switch and a low side switch coupled in series, with a first end of an output inductor coupled to a node between the high side switch and the low side switch and a second end of the output inductor providing a regulated output for a load, with an output capacitor coupled to the second end of the output inductor, and a bypass switch coupling the first end and second end of the output inductor;

a pulse width modulation (PWM) signal generator configured to generate a PWM signal having a duty cycle;

a first comparator configured to determine if a voltage of the regulated output is greater than a first predefined voltage;

a second comparator configured to determine if the voltage of the regulated output is less than a second predefined voltage;

logic circuitry to control the high side switch, the low side switch, and the bypass switch based on at least the PWM signal;

first averaging circuitry configured to determine a first average value over time of an output of the first comparator;

second averaging circuitry configured to determine a second average value over time of an output of the second comparator;

first evaluation circuitry configured to determine a first indication of a load current based on the first average value over time of the output of the first comparator; and

second evaluation circuitry configured to determine a second indication of the load current based on the second average value over time of the output of the second comparator.

2. The DC-DC converter of claim 1 , wherein the first predefined voltage is a desired output voltage plus a tolerance voltage.

3. The DC-DC converter of claim 2 , wherein the second predefined voltage is a desired output voltage minus a tolerance voltage.

4. The DC-DC converter of claim 1 , wherein the first average value is a function of the load current, a converter input voltage, a desired output voltage, and an inductance value, and a period of a switching frequency.

5. The DC-DC converter of claim 1 , wherein the second average value is a function of the load current, a bias voltage, a voltage offset, and a parasitic resistance.

6. The DC-DC converter of claim 1 , wherein the logic circuitry is further configured to control the high side switch, low side switch, and the bypass switch based on the output of the first comparator.

7. The DC-DC converter of claim 1 , wherein the first evaluation circuitry is configured to determine the first indication of the load current by assuming that the first average value is related to the load current by a first order equation.

8. The DC-DC converter of claim 1 , wherein the first evaluation circuitry is configured to determine the second indication of the load current by assuming that the second average value is related to the load current by a first order equation.

9. The DC-DC converter of claim 1 , wherein the first indication of the load current is the load current during a pulse frequency modulation mode operation of the high side and low side switches.

10. The DC-DC converter of claim 1 , wherein the second indication of the load current is the load current during a pulse width modulation mode operation of the high side and low side switches.

11. A method useful for determining load current from a DC-DC converter, comprising:

determining a first digital average of a first signal indicating whether an output voltage of the DC-DC converter exceeds a first predefined voltage;

determining a second digital average of a second signal indicating whether the output voltage of the DC-DC converter is less than a second predefined voltage;

if the converter is operating in a pulse frequency modulation (PFM) mode, determining a first indication of a load current using the first digital average; and

if the DC-DC converter is operating in a pulse width modulation mode, determining a second indication of the load current using the second digital average.

12. The method of claim 11 , wherein determining the first indication of the load current is based on a predetermined relationship between the load current and the first digital average.

13. The method of claim 12 , wherein the predetermined relationship is based on a first order equation relating the load current and the first digital average.

14. The method of claim 11 , wherein determining the second indication of the load current is based on a predetermined relationship between the load current and the second digital average.

15. The method of claim 14 , wherein the predetermined relationship is based on a first order equation relating the load current and the second digital average.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD.
To: ENDURA IP HOLDINGS LTD.
Reel/Frame 063424/0226 →
CHANGE OF NAME Recorded Mar 29, 2022
From: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.
To: CHAOYANG SEMICONDUCTOR (SHANGHAI) CO., LTD
Reel/Frame 061088/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2018
From: ENDURA IP HOLDINGS LTD.
To: ENDURTECH (HONG KONG) LIMITED
Reel/Frame 045987/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2018
From: ENDURTECH (HONG KONG) LIMITED
To: CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO. LTD.
Reel/Frame 045989/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2018
From: ENDURA TECHNOLOGIES LLC
To: ENDURA IP HOLDINGS LTD.
Reel/Frame 045931/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2017
From: IHS, HASSAN; RAU, JASON
To: ENDURA TECHNOLOGIES LLC
Reel/Frame 043726/0271 →
Continuity (2)
Provisional Application 62171983 · Jun 5, 2015
Related Publication 20160359413A1 · Dec 8, 2016