Granted Patent B2

US 9,807,323 · App. 15/176,355 · Granted Oct 31, 2017

Abstract

Claims (71)

1. An imaging system having a pixel array that includes a plurality of pixel circuits, each pixel circuit comprising:

a photodiode configured to generate charges in response to light or radiation;

a biasing circuit configured to provide a constant bias voltage across the photodiode to drain the charges generated by the photodiode;

a first charge-to-voltage converter configured to accumulate the charges drained by the biasing circuit and convert the accumulated charges into a corresponding output voltage;

a second charge-to-voltage converter; and

a gain-switching circuit configured to select the second charge-to-voltage converter to accumulate the charges generated by the photodiode in response to detection of the output voltage exceeding a threshold voltage.

2. The imaging system of claim 1 , wherein the gain-switching circuit comprises:

a voltage comparator configured to generate a select signal according to a difference between the output voltage and the threshold voltage; and

a select circuit configured to generate a latch signal associated with a logic level of the select signal, wherein the second charge-to-voltage converter is selectively coupled in parallel with the first charge-to-voltage converter based on the latch signal.

3. The imaging system of claim 1 , wherein the first charge-to-voltage converter comprises:

a first end coupled to a cathode of the photodiode; and

a second end for outputting the output voltage.

4. The imaging system of claim 3 , wherein the biasing circuit comprises:

an operational amplifier including:

a non-inverting input end;

an inverting input end coupled to the cathode of the photodiode;

an output end coupled to the second end of the first charge-to-voltage converter; and

a voltage source coupled between an anode of the photodiode and the non-inverting input end of the operational amplifier to provide the constant bias voltage.

5. The imaging system of claim 1 , wherein the first charge-to-voltage converter comprises:

a first end coupled to an anode of the photodiode; and

a second end for outputting the output voltage.

6. The imaging system of claim 5 , wherein the biasing circuit comprises:

a first transistor including:

a first end coupled to a cathode of the photodiode;

a second end; and

a control end;

a second transistor including:

a first end;

a second end coupled to the control end of the first transistor; and

a control end coupled to the control end of the first transistor;

a third transistor including:

a first end;

a second end coupled to the second end of the first transistor; and

a control end coupled to the second end of the first transistor;

a fourth transistor including:

a first end coupled to the first end of the third transistor;

a second end coupled to the control end of the first transistor; and

a control end coupled to the second end of the first transistor;

a fifth transistor including:

a first end coupled to the first end of the third transistor;

a second end coupled to the second end of the first charge-to-voltage converter; and

a control end coupled to the second end of the first transistor; and

a voltage source coupled between the anode of the photodiode and the first end of the second transistor to provide the constant bias voltage.

7. The imaging system of claim 1 , wherein the each pixel circuit further comprises:

a first switch to selectively couple the second end of the first charge-to-voltage converter to a data line; and

a second switch to reset the first charge-to-voltage converter.

8. The imaging system of claim 1 , further comprising:

a first processing circuit configured to:

acquire a first signal sample by reading an output voltage generated by a charge-to-voltage converter in a first pixel circuit among the plurality of the pixels circuits before resetting the charge-to-voltage converter in the first pixel circuit; and

acquire a second signal sample by reading an output voltage generated by a charge-to-voltage converter in a second pixel circuit among the plurality of the pixels circuits before resetting the charge-to-voltage converter in the second pixel circuit; and

a second processing circuit configured to:

acquire a first reset sample by reading the output voltage generated by the charge-to-voltage converter in the first pixel circuit after resetting the charge-to-voltage converter in the first pixel circuit; and

acquire a second reset sample by reading the output voltage generated by the charge-to-voltage converter in the second pixel circuit after resetting the charge-to-voltage converter in the second pixel circuit.

9. The imaging system of claim 8 , wherein the first reset sample and the second signal sample are acquired simultaneously.

10. The imaging system of claim 8 , wherein:

the first pixel circuit is arranged in an m th row and an n th column of the pixel array, m and n being positive integers; and

the second pixel circuit is arranged in an (m+1) th row and the n th column of the pixel array.

11. The imaging system of claim 1 , wherein the first charge-to-voltage converter is a linear plate capacitor.

12. The imaging system of claim 1 , wherein the constant bias voltage is zero.

13. An imaging method, comprising:

maintaining a voltage established across a photodiode at a constant value to drain charges generated by the photodiode in response to light or radiation;

accumulating the charges drained from the photodiode in a first charge-to-voltage converter and converting the accumulated charges into a corresponding output voltage during an image acquisition period; and

acquiring a signal sample by reading the output voltage during a readout period subsequent to the image acquisition period.

14. The imaging method of claim 13 , further comprising:

resetting the first charge-to-voltage converter during a reset period and prior to the image acquisition period;

acquiring a reset sample associated with charges accumulated in the first charge-to-voltage converter during the reset period; and

generating a video signal associated the charges generated by the photodiode during the image acquisition period based on the signal sample and the reset sample.

15. The imaging method of claim 14 , wherein the video signal is associated with the signal sample subtracted by the reset sample.

16. The imaging method of claim 13 , further comprising:

operating a biasing circuit in a first mode in which a bias current of the biasing circuit is modulated to a first value for keeping the charge-to-voltage converter partially but sufficiently operational to maintain the voltage established across the photodiode at the constant value during the image acquisition period; and

operating the biasing circuit in a second mode in which the bias current of the biasing circuit is modulated to a second value, which is larger than the first value, for keeping the charge-to-voltage converter fully operational to transmit the signal sample to a readout circuit during the reset period or the readout period.

Assignments (8)