Integrated control module for communication system on a chip for silicon photonics

1. A system comprising an integrated system-on-chip device, the system comprising:

a silicon substrate member;

a data input/output interface provided on the silicon substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the silicon substrate member and coupled to the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a signal processing block provided on the silicon substrate member and coupled to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the silicon substrate member and coupled to the signal processing block using a uni-directional multi-lane bus;

a driver interface provided on the silicon substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in an amplitude modulation format;

a receiver module comprising a TIA block coupled to the silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a laser coupled to the silicon photonics device;

a communication block coupled to the silicon substrate member and operably coupled to the input/output block, the signal processing block;

a communication interface coupled to the communication block; and

a control block coupled to the communication block, the driver module, and the receiver module via the communication interface, the control block being configured to receive and send instruction(s) in a digital format to the communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device; and

wherein the amplified modulation format is a PAM format.

2. The system of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block.

3. The system of claim 1 wherein the driver module is selected from a current drive or a voltage driver.

4. The system of claim 1 wherein the driver module is a differential driver.

5. The system of claim 1 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

6. The system of claim 1 wherein the control block is configured to initiate a laser bias or a modulator bias.

7. The system of claim 1 wherein the control block is configured for laser bias and power control of the silicon photonics device.

8. The system of claim 1 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

9. The system of claim 1 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.

10. A system comprising an integrated multi-chip device, the system comprising:

a first silicon substrate member;

a second silicon substrate member;

a third silicon substrate member;

a data input/output interface provided on the first silicon substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the first silicon substrate member and coupled to the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a signal processing block provided on the first silicon substrate member and coupled to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the second silicon substrate member and coupled to the signal processing block using a uni-directional multi-lane bus through PCB traces;

a driver interface coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;

a receiver module comprising a TIA block provided on the third silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and coupled to the signal processing block using a uni-directional multi-lane bus through PCB traces to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the first silicon substrate member and directly coupled to the input/output block and the signal processing block;

a communication interface coupled to the communication block; and

a control block provided on the first silicon substrate member and coupled to the communication block, the driver module, and the receiver module via the communication interface, the control block being configured to receive and send instruction(s) in a digital format to the communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the communication interface;

wherein the amplified modulation format is a PAM format; and

the integrated multi-chip device is configured in a network.

11. The system of claim 10 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block.

12. The system of claim 10 wherein the driver module is selected from a current driver or a voltage driver.

13. The system of claim 10 wherein the driver module is a differential driver.

14. The system of claim 10 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

15. The system of claim 10 wherein the control block is configured to initiate a laser bias or a modulator bias.

16. The system of claim 10 wherein the control block is configured for laser bias and power control of the silicon photonics device.

17. The system of claim 10 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

18. The device of claim 10 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.

19. A method of using an integrated multi-chip device, the method comprising: forming an integrated multi-chip device configured in a network, the integrated multi-chip device comprising a silicon substrate member; a data input/output interface provided on the silicon substrate member and configured for a predefined data rate and protocol; an input/output block provided on the silicon substrate member and coupled to the 8 data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block; a signal processing block provided on the silicon substrate member and coupled to the input/output block using a bi-direction bus in an intermediary protocol; a driver module provided on the silicon substrate member and coupled to the signal processing block using a uni-directional multi-lane bus; a driver interface provided on the silicon substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in an amplitude modulation format, the amplitude modulation formation being a PAM format; a receiver module comprising a TIA block coupled to the silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface; a laser coupled to the silicon photonics device; a communication block coupled to the silicon substrate member and operably coupled to the input/output block, the signal processing block, the driver module, and the receiver module; a communication interface coupled to the communication block; and a control block coupled to the communication block, the control block being configured to receive and send instruction(s) in a digital format to the communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device; and transferring signals to the silicon photonics device and to the network.

20. A method of using an integrated multi-chip device, the method comprising:

providing an integrated multi-chip device configured in a network, the integrated multi-chip device comprising a first silicon substrate member;

a second silicon substrate member;

a third silicon substrate member;

a data input/output interface provided on the first silicon substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the first silicon substrate member and coupled to the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a signal processing block provided on the first silicon substrate member and coupled to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the second silicon substrate member and coupled to the signal processing block using a uni-directional multi-lane bus through PCB traces;

a driver interface coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data an amplitude modulation format being a PAM format;

a receiver module comprising a TIA block provided on the third silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and coupled to the signal processing block using a uni-directional multi-lane bus through PCB traces to communicate information to the input/output block for transmission through the data input/output interface;

a laser device coupled to the silicon photonics device;

a communication block provided on the first silicon substrate member and directly coupled to the input/output block, the signal processing block, and operably coupled to the driver module and the receiver module;

a communication interface coupled to the communication block; and

a control block provided on the first silicon substrate member and coupled to the communication block, the control block being configured to receive and send instruction(s) in a digital format to the communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the communication interface; and

using the integrated multi-chip device in the network.

21. A system comprising an integrated multi-chip device, the system comprising:

a first silicon substrate member;

a second silicon substrate member;

a third silicon substrate member;

a fourth silicon substrate member;

a first data input/output interface provided on the first silicon substrate member and configured for a predefined data rate and protocol;

a first input/output block provided on the first silicon substrate member and coupled to the first data input/output interface, the first input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a first signal processing block provided on the first silicon substrate member and coupled to the first input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the third silicon substrate member and coupled to the first signal processing block using a uni-directional multi-lane bus through PCB traces;

a driver interface coupled to the driver module and configured to be coupled to a silicon photonics device and to transmit output data in an amplitude modulation format, the amplitude modulation formation being a PAM format;

a laser device being coupled to the silicon photonics device;

a first communication block provided on the first silicon substrate member and directly coupled to the first input/output block and the first signal processing block;

a first communication interface coupled to the first communication block;

a first control block provided on the first silicon substrate member and coupled to the first communication block and the driver module, the first control block being configured to receive and send instruction(s) in a digital format to the first communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the first communication interface;

a second data input/output interface provided on the second silicon substrate member and configured for a predefined data rate and protocol;

a second input/output block provided on the second silicon substrate member and coupled to the second data input/output interface, the second input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a second signal processing block provided on the second silicon substrate member and coupled to the second input/output block using a bi-direction bus in an intermediary protocol;

a receiver module comprising a TIA block provided on the fourth silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and coupled to the second signal processing block using a uni-directional multi-lane bus through PCB traces to communicate information to the second input/output block for transmission through the second data input/output interface;

a second communication block provided on the second silicon substrate member and directly coupled to the second input/output block and the second signal processing block;

a second communication interface coupled to the second communication block; and

a second control block provided on the second silicon substrate member and coupled to the second communication block and the receiver module, the second control block being configured to receive and send instruction(s) in a digital format to the second communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the second communication interface.

22. A system comprising an integrated multi-chip device, the system comprising:

a first silicon substrate member;

a second silicon substrate member;

a third silicon substrate member;

a first data input/output interface provided on the first silicon substrate member and configured for a predefined data rate and protocol;

a first input/output block provided on the first silicon substrate member and coupled to the first data input/output interface, the first input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a first signal processing block provided on the first silicon substrate member and coupled to the first input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the third silicon substrate member and coupled to the first signal processing block using a uni-directional multi-lane bus through PCB traces;

a driver interface coupled to the driver module and configured to be coupled to a silicon photonics device and to transmit output data in either an amplitude modulation format, the amplitude modulation formation is a PAM format;

a laser device being coupled to the silicon photonics device;

a first communication block provided on the first silicon substrate member and directly coupled to the first input/output block and the first signal processing block;

a first communication interface coupled to the first communication block;

a first control block provided on the first silicon substrate member and coupled to the first communication block and the driver module, the first control block being configured to receive and send instruction(s) in a digital format to the first communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the first communication interface;

a second data input/output interface provided on the second silicon substrate member and configured for a predefined data rate and protocol;

a second input/output block provided on the second silicon substrate member and coupled to the second data input/output interface, the second input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a second signal processing block provided on the second silicon substrate member and coupled to the second input/output block using a bi-direction bus in an intermediary protocol;

a receiver module comprising a TIA block provided on the second silicon substrate member and to be coupled to the silicon photonics device using predefined modulation format, and coupled to the second signal processing block using a uni-directional multi-lane bus on the second silicon substrate member to communicate information to the second input/output block for transmission through the second data input/output interface;

a second communication block provided on the second silicon substrate member and directly coupled to the second input/output block and the second signal processing block;

a second communication interface coupled to the second communication block; and

a second control block provided on the second silicon substrate member and coupled to the second communication block and the receiver module, the second control block being configured to receive and send instruction(s) in a digital format to the second communication block and being configured to receive and send signals in an analog format to communicate with the silicon photonics device via the second communication interface.