IP Library Granted Patent US 10,135,467
Granted Patent B2
US 10,135,467 · App. 15/176,979 · Granted Nov 20, 2018

Methods and systems for applying an improved interleaver for modems operating on power grid

Inventor: Walter Downey (San Jose, CA)
Assignee: Echelon Corporation
H03M13/2792H03M13/2789H04L1/0041H04L1/0071
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Quick Facts
Patent No.
US 10,135,467
App. No.
15/176,979
Granted
Nov 20, 2018
Kind
B2
Abstract

Methods and systems are disclosed for applying an interleaver that better distributes signal errors to be used in devices operating on low voltage power grids. One embodiment of a method comprises: determining a frequency cycle of the communication medium; setting an interleaver block size based on the frequency cycle of the communication medium; re-arranging bits in a data packet based on the interleaver block size; transmitting the re-arranged data packet over the communication medium to a receiver. Specifically, according to an embodiment, the interleaver block size is set to one-half of the frequency cycle of the communication medium.

Claims (14)

1. A method for transmitting data over a communication medium using interleaver error distribution, the communication medium being a low voltage power grid, the method comprising:

determining, by frequency detector circuitry, a frequency cycle of the communication medium;

setting, by interleaver processor circuitry, an interleaver block size to one-half of the determined frequency cycle of the communication medium;

rearranging, by encoder circuitry, bits in a data packet based on the interleaver block size; and

transmitting, by input/output (I/O) circuitry, the re-arranged data packet over the communication medium to a receiver.

2. The method of claim 1 , wherein the communication medium uses an alternating current (AC) waveform as a frequency of 50 Hz.

3. The method of claim 1 , wherein the communication medium uses an alternating current (AC) waveform as a frequency of 60 Hz.

4. An apparatus comprising:

frequency detector circuitry to detect a frequency cycle of a communication medium to which the apparatus is coupled to, the communication medium being a low voltage power grid;

interleaver processor circuitry to set an interleaver block size to one-half of the detected frequency cycle of the communication medium;

encoder circuitry to re-arrange bits in a data packet based on the interleaver block size; and

input/output (I/O) circuitry to transmit the re-arranged data packet over the communication medium.

5. The apparatus of claim 4 , wherein the communication medium uses an alternating current (AC) waveform as a frequency of 50 Hz.

6. The apparatus of claim 4 , wherein the communication medium uses an alternating current (AC) waveform as a frequency of 60 Hz.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Sep 24, 2019
From: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
To: ECHELON CORPORATION
Reel/Frame 050480/0865 →
SECURITY INTEREST Recorded Oct 8, 2018
From: ECHELON CORPORATION
To: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
Reel/Frame 047205/0018 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2017
From: DOWNEY, WALTER
To: ECHELON CORPORATION
Reel/Frame 044122/0438 →
Continuity (1)
Related Publication 20170359149A1 · Dec 14, 2017