IP Library Granted Patent US 9,847,288
Granted Patent B2
US 9,847,288 · App. 15/182,111 · Granted Dec 19, 2017

Semiconductor having protective lines

Inventors: Young Hee Yoon (Gyeonggi-do, KR); Bum Su Kim (Chungcheongbuk-do, KR); Yung Bog Yoon (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
H01L23/5225H01L23/5283
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Quick Facts
Patent No.
US 9,847,288
App. No.
15/182,111
Granted
Dec 19, 2017
Kind
B2
Abstract

A semiconductor device includes a signal transmission line extending in a first direction; an outer protective line extending in a substantially identical direction as the first direction and spaced apart from the signal transmission line by a predetermined distance along a second direction which is substantially perpendicular to the first direction; and an inner protective line, disposed between the outer protective line and the signal transmission line, and intermittently extending substantially in parallel with said signal transmission line and outer protective line.

Claims (12)

1. A semiconductor device comprising:

a signal transmission line extending in a first direction;

a first outer protective line and a second outer protective line extending in a substantially identical direction as the first direction, spaced apart from the signal transmission line by a predetermined distance along a second direction which is substantially perpendicular to the first direction and symmetrically disposed on both sides of the signal transmission line;

a first inner protective line, disposed between the first outer protective line and the signal transmission line, and intermittently extending substantially in parallel with the signal transmission line and the first outer protective line; and

a second inner protective line, disposed between the second outer protective line and the signal transmission line, and intermittently extending substantially in parallel with the signal transmission line and the second outer protective line.

2. The semiconductor device according to claim 1 , wherein the first inner protective line and the second inner protective line are spaced apart from the signal transmission line by a predetermined distance.

3. The semiconductor device according to claim 1 , wherein the first outer protective line and the second outer protective line receive a ground voltage.

4. The semiconductor device according to claim 3 , wherein the first inner protective line and the second inner protective line are in a floating state.

5. The semiconductor device according to claim 4 , wherein the first inner protective line and the second inner protective line are shorter than the first inner protective line and the second inner protective line, respectively.

6. The semiconductor device according to claim 4 , wherein the first inner protective line and the second inner protective line include a plurality of inner protective line elements each having a predetermined length in the first direction.

7. The semiconductor device according to claim 4 , wherein the first inner protective line and the second inner protective line include one or more divided, intermittent protective lines each extending in parallel in the first direction and spaced apart at a regular interval along the second.

8. The semiconductor device according to claim 4 , wherein the signal transmission line receives at least one of a clock signal and a data signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2016
From: YOON, YOUNG HEE; KIM, BUM SU; YOON, YUNG BOG
To: SK HYNIX INC.
Reel/Frame 039007/0551 →
Priority Claims (1)
KR 10-2016-0008106 · Jan 22, 2016 · national
Continuity (1)
Related Publication 20170213789A1 · Jul 27, 2017