IP Library Patent Application 15184744
Patent Application
App. No. 15/184,744

HEARING DEVICE WITH EMBEDDED DIE STACK

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Quick Facts
Patent No.
US None
App. No.
15/184,744
Abstract

Described herein are methods and apparatus in which two integrated circuit dies are stacked and embedded in a printed circuit board (PCB) substrate. In one embodiment, the two dies are stacked directly on top of one another with and electrically connected with through-silicon-vias (TSVs). The interconnect routing between the two die occurs within the TSVs and die level redistribution layer (RDL) routing. The resulting die stack can then be embedded into a single layer of the PCB substrate rather than in two separate layers.

Claims (31)

1 . An electronic device, comprising:

a first die;

a second die;

a printed circuit board (PCB) substrate;

wherein the first die is stacked on top of the second die to form a die stack, wherein the first and second dies are electrically connected; and,

wherein the die stack is embedded in a single first layer of the PCB substrate.

2 . The device of claim 1 wherein a third die is embedded in a second layer of the PCB substrate.

3 . The device of claim 1 wherein second die has through-silicon-vias (TSVs) incorporated therein that electrically connect the first and second dies.

4 . The device of claim 1 wherein the first and second dies are placed back to back with active die side and interconnect in opposing directions to electrically connect the first and second dies.

5 . The device of claim 1 , wherein the electronic device is placed in a behind-the-ear hearing device.

6 . The device of claim 5 , wherein the hearing device is a BTE hearing aid.

7 . The device of claim 5 , wherein the hearing device is a RIC hearing aid.

8 . The device of claim 1 , wherein the electronic device is used in circuitry in a hearing device configured to be placed within an ear of a wearer.

9 . The device of claim 8 , wherein the hearing device is an in-the-canal hearing aid.

10 . The device of claim 8 , wherein the hearing device is a completely-in-the-canal hearing aid.

11 . The device of claim 8 , wherein the hearing device is an invisible-in-the-canal hearing aid.

12 . A method for constructing an electronic device, comprising:

stacking a first die is on top of a second die to form a die stack with the first and second dies electrically connected; and,

embedding the die stack in a single first layer of a printed circuit board (PCB) substrate.

13 . The method of claim 12 further comprising embedding a third die in a second layer of the PCB substrate.

14 . The method of claim 12 wherein second die has through-silicon-vias (TSVs) incorporated therein that electrically connect the first and second dies.

15 . The method of claim 12 wherein the first and second dies are placed back to back with active die side and interconnect in opposing directions to electrically connect the first and second dies.

16 . A hearing device, comprising:

a microphone to convert an audio input into a first input signal;

processing circuitry to process the first input signal, the second input signal, or a combination thereof into an output signal;

wherein the processing circuitry comprises a first die and a second die and wherein the first die is stacked on top of the second die to form a die stack with the first and second dies are electrically connected; and,

wherein the die stack is embedded in a single first layer of a printed circuit board (PCB) substrate.

17 . The device of claim 16 , further comprising a third die embedded in a second layer of the PCB substrate.

18 . The device of claim 16 , wherein second die has through-silicon-vias (TSVs) incorporated therein that electrically connect the first and second dies.

19 . The device of claim 16 , wherein the first and second dies are placed back to back with active die side and interconnect in opposing directions to electrically connect the first and second dies.

20 . The device of claim 16 , comprising hearing aid electronics programmed to compensate for a patient's hearing deficit.

Assignments (3)
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Aug 25, 2018
From: STARKEY LABORATORIES, INC.
To: CITIBANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046944/0689 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE ASSIGNOR EXECUTION PREVIOUSLY RECORDED ASSIGNMENT PREVIOUSLY RECORDED ON REEL 044653 FRAME 0317. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Jan 23, 2018
From: LAMBERT, ANDY
To: STARKEY LABORATORIES, INC.
Reel/Frame 045117/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2018
From: LAMBERT, ANDY
To: STARKEY LABORATORIES, INC.
Reel/Frame 044653/0317 →