IP Library Granted Patent US 10,057,007
Granted Patent B2
US 10,057,007 · App. 15/190,163 · Granted Aug 21, 2018

Transmission method, reception method, transmitter, and receiver

Inventors: Yutaka Murakami (Kanagawa, JP); Tomohiro Kimura (Osaka, JP); Mikihiro Ouchi (Osaka, JP)
Assignee: Panasonic Intellectual Property Corporation of America
H04L1/0041H03M13/255H04L1/0045H04L27/34H03M13/1102H03M13/1165H04B7/0413H04L27/18
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Quick Facts
Patent No.
US 10,057,007
App. No.
15/190,163
Granted
Aug 21, 2018
Kind
B2
Abstract

In a transmission method according to one aspect of the present disclosure, a encoder performs error correction coding on an information bit string to generate a code word. A mapper modulates a first bit string in which the number of bits is the predetermined integral multiple of (X+Y) in the code word using a first scheme, the first scheme being a set of a modulation scheme in which an X-bit bit string is mapped to generate a first complex signal and a modulation scheme in which a Y-bit bit string is mapped to generate a second complex signal, and modulates a second bit string in which the first bit string is removed from the code word using a second scheme different from the first scheme.

Claims (28)

1. A transmission method comprising:

performing error correction coding on an information bit string to generate a code word having a number of bits that is greater than a predetermined integral multiple of (X+Y);

modulating a first bit string in which the number of bits is the predetermined integral multiple of (X+Y) in the code word using a first scheme, the first scheme being a set of a modulation scheme in which an X-bit bit string is mapped to generate a first complex signal and a modulation scheme in which a Y-bit bit string is mapped to generate a second complex signal; and

modulating a second bit string in which the first bit string is removed from the code word using a second scheme different from the first scheme.

2. The transmission method according to claim 1 , wherein the second scheme is a set of a modulation scheme in which an A-bit bit string is mapped to generate a third complex signal and a modulation scheme in which a B-bit bit string is mapped to generate a fourth complex signal, and

(A+B) is a divisor of the number of bits of the second bit string.

3. The transmission method according to claim 2 , further comprising:

transmitting complex signals generated by performing space-time block coding on the first complex signal and the second complex signal.

4. The transmission method according to claim 1 , wherein the second scheme is a modulation scheme which generates a single-stream complex signal by using a third complex signal and a fourth complex signal.

5. The transmission method according to claim 4 , further comprising:

transmitting complex signals of a plurality of streams generated by performing the space-time block coding, the complex signals of a plurality of streams being generated by using the first scheme, and the single-stream complex signal generated by not performing the space-time block coding, the single-stream complex signal being generated by using the second scheme.

6. A transmitter comprising:

an encoder that performs error correction coding on an information bit string to generate a code word having a number of bits is greater than a predetermined integral multiple of (X+Y); and

a mapper that modulates a first bit string in which the number of bits is the predetermined integral multiple of (X+Y) in the code word using a first scheme, the first scheme being a set of a modulation scheme in which an X-bit bit string is mapped to generate a first complex signal and a modulation scheme in which a Y-bit bit string is mapped to generate a second complex signal, and modulates a second bit string in which the first bit string is removed from the code word using a second scheme different from the first scheme.

7. A reception method comprising:

demodulating a received signal to generate a demodulated signal according to a first scheme and a second scheme,

the first scheme being a scheme of a set of a modulation scheme in which an X-bit bit string is mapped to generate a first complex signal and a modulation scheme in which a Y-bit bit string is mapped to generate a second complex signal,

the second scheme being different from the first scheme,

the received signal being a signal obtained by receiving a transmitted signal transmitted from a transmitter,

the transmitted signal including a first signal and a second signal, the first signal being generated from a first bit string in which a number of bits is a predetermined integral multiple of (X+Y) using the first scheme, the second signal being generated from a second bit string in which the number of bits is not the predetermined integral multiple of (X+Y) using the second scheme, the first bit string and the second bit string constructing a code word being generated by performing error correction coding on information bit string; and

performing error correction decoding on the demodulated signal.

8. A receiver comprising:

a signal processor that demodulates a received signal to generate a demodulated signal according to a first scheme and a second scheme,

the first scheme being a scheme of a set of a modulation scheme in which an X-bit bit string is mapped to generate a first complex signal and a modulation scheme in which a Y-bit bit string is mapped to generate a second complex signal,

the second scheme being different from the first scheme,

the received signal being a signal obtained by receiving a transmitted signal transmitted from a transmitter,

the transmitted signal including a first signal and a second signal, the first signal being generated from a first bit string in which a number of bits is a predetermined integral multiple of (X+Y) using the first scheme, the second signal being generated from a second bit string in which the number of bits is not the predetermined integral multiple of (X+Y) using the second scheme, the first bit string and the second bit string constructing a code word being generated by performing error correction coding on information bit string; and

a decoder that performs error correction decoding on the demodulated signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2016
From: MURAKAMI, YUTAKA; KIMURA, TOMOHIRO; OUCHI, MIKIHIRO
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 039388/0659 →
Priority Claims (1)
JP 2013-270949 · Dec 27, 2013 · national
Continuity (2)
Continuation PCTJP2014006341 · Dec 19, 2014
Related Publication 20160315733A1 · Oct 27, 2016