Systems and methods for solving computational problems
View Patent ↗Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
1. A method of performing a quantum annealing operation using a quantum processor comprising a first set of qubits communicably coupled to a first annealing signal line, and at least a second set of qubits communicably coupled to a second annealing signal line, the method comprising:
programming the quantum processor in a configuration that represents at least one system,
applying a first dynamic annealing waveform to each qubit in the first set of qubits via the first annealing signal line to evolve a respective state of each qubit in the first set of qubits; and
applying a second dynamic annealing waveform to each qubit in the second set of qubits via the second annealing signal line to evolve a respective state of each qubit in the second set of qubits,
wherein the first dynamic annealing signal evolves differently from the second dynamic annealing signal over the course of the quantum annealing operation in order to find a low energy state of the at least one system.
2. The method of claim 1 , wherein the quantum processor further comprises a third set of qubits and a third annealing signal line and the method further comprising:
applying a third dynamic annealing waveform to each qubit in the third set of qubits via the third annealing signal line to evolve a respective state of each qubit in the third set of qubits, and wherein the first, the second and the third annealing waveforms evolve differently over the course of the quantum annealing operation.
3. The method of claim 2 wherein at least a portion of the applying the third dynamic annealing waveform occurs during at least a portion of the applying the first dynamic annealing waveform.
4. The method of claim 2 wherein at least a portion of the applying the third dynamic annealing waveform occurs during at least a portion of the applying the second dynamic annealing waveform.
5. The method of claim 2 wherein at least a portion of the applying the first dynamic annealing waveform occurs during at least a portion of the applying the second dynamic annealing waveform.
6. The method of claim 1 wherein the evolution of the first annealing waveform completes before the evolution of the second annealing waveform completes.
7. The method of claim 1 wherein the evolution of the first annealing waveform completes after the evolution of the second annealing waveform completes.
8. The method of claim 1 wherein at least one of the first or the second annealing waveforms evolve non-linearly.
9. The method of claim 1 wherein at least one of the first or the second annealing waveforms oscillate over the course of the quantum annealing operation.
10. The method of claim 1 wherein the first and the second dynamic annealing waveforms comprise values in a range of values between a minimum annealing signal value and a maximum annealing signal value;
applying a first dynamic annealing waveform to each qubit in the first set of qubits includes applying a first dynamic annealing waveform that evolves from the maximum annealing signal value to the minimum annealing signal value; and
applying a second dynamic annealing waveform to each qubit in the second set of qubits includes applying the second dynamic annealing waveform after the first dynamic annealing waveform reaches the minimum annealing signal value, wherein the second annealing waveform evolves from the maximum annealing signal value to the minimum annealing signal value.
11. The method of claim 10 wherein the quantum processor further comprises a third set of qubits and a third annealing signal line, the method further comprising:
applying a third dynamic annealing waveform to each qubit in the third set of qubits via the third annealing signal line to evolve a respective state of each qubit in the third set of qubits, the third dynamic annealing waveform in a range of values between the minimum annealing signal value and the maximum annealing signal value; and
wherein the third dynamic annealing waveform starts evolving after the second dynamic annealing waveform reaches the minimum annealing signal value and the third annealing waveform evolves from the maximum annealing signal value to the minimum annealing signal value.
12. The method of claim 11 wherein at least a portion of the applying the first dynamic annealing waveform occurs during at least a portion of the applying the second dynamic annealing waveform.
13. The method of claim 11 wherein the applying the first dynamic annealing waveform partially overlaps in time with the applying the second dynamic annealing waveform.
14. The method of claim 1 , wherein programming the quantum processor further comprises:
mapping a logic circuit representation of a computational problem to the first set of qubits, at least the second set of qubits, a first set of coupling devices, and at least a second set of coupling devices in the quantum processor.
15. The method of claim 14 wherein applying a second dynamic annealing waveform to each qubit in the second set of qubits via the second annealing signal line to evolve a respective state of each qubit in the second set of qubits determines a solution to the logic circuit representation of the computational problem.
16. The method of claim 14 wherein the computational problem is selected from a group consisting of constraint satisfaction problems, discrete optimization problems, sets of miniature optimization problems, and factoring problems.
17. The method of claim 14 wherein applying a second dynamic annealing waveform to each qubit in the second set of qubits via the second annealing signal line to evolve a respective state of each qubit in the second set of qubits minimizes the computational problem, and the computational problem is minimized when the logic circuit representation of the computational problem is obeyed.