IP Library Granted Patent US 9,865,463
Granted Patent B2
US 9,865,463 · App. 15/193,367 · Granted Jan 9, 2018

Method of manufacturing a semiconductor device

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Quick Facts
Patent No.
US 9,865,463
App. No.
15/193,367
Granted
Jan 9, 2018
Kind
B2
Abstract

In a method of manufacturing a semiconductor device, a first photoresist layer is applied on a polycrystalline silicon layer formed on a semiconductor substrate. The first photoresist layer is then patterned and cured with UV rays. The polycrystalline silicon layer is etched, using the first photoresist layer as a mask, to form a gate electrode and a resistive film of the polycrystalline silicon layer. A second photoresist layer is applied on the cured first photoresist layer and patterned to form an opening portion exposing the first photoresist layer. Impurities are ion implanted through the opening portion in the polycrystalline silicon layer. The channeling of impurities implanted during the ion implantation is suppressed by the cured first photoresist layer.

Claims (21)

1. A method of manufacturing a semiconductor device, for forming, in a self-alignment manner, an impurity layer with respect to a pattern of a polycrystalline silicon layer formed on a semiconductor substrate, the method comprising:

forming the polycrystalline silicon layer directly on the semiconductor substrate;

applying, on the polycrystalline silicon layer, a first photoresist layer, and then patterning the first photoresist layer;

irradiating the patterned first photoresist layer with UV rays;

forming a gate electrode and a resistive film of the polycrystalline silicon layer by etching the polycrystalline silicon layer using the first photoresist layer irradiated with the UV rays as a mask;

applying a second photoresist layer on the first photoresist layer irradiated with the UV rays, and then patterning the second photoresist layer to form an opening portion in part of the second photoresist layer, to thereby expose the first photoresist layer in the opening portion; and

implanting first impurities into the opening portion by ion implantation.

2. A method of manufacturing a semiconductor device according to claim 1 , further comprising, after the implanting first impurities by ion implantation:

removing the second photoresist layer;

applying a third photoresist layer on the first photoresist layer, and then patterning the third photoresist layer to form a second opening portion in part of the third photoresist layer, to thereby expose the first photoresist layer in the second opening portion; and

implanting second impurities into the second opening portion by ion implantation.

3. A method of manufacturing a semiconductor device according to claim 2 , wherein the removing the second photoresist layer comprises using a photoresist removing solvent.

4. A method of manufacturing a semiconductor device according to claim 1 , wherein the opening portion is formed at least on a source/drain impurity layer forming region of a MOS transistor.

5. A method of manufacturing a semiconductor device according to claim 1 , further comprising, after the forming a gate electrode and a resistive film of the polycrystalline silicon layer, performing ion implantation on an entire surface of the semiconductor substrate with the first photoresist layer that has been irradiated with the UV rays and has remained, to thereby form, in a self-alignment manner, a source/drain impurity layer to the gate electrode formed of the polycrystalline silicon layer.

6. A method of manufacturing a semiconductor device according to claim 1 , wherein the irradiating the patterned first photoresist layer with UV rays is performed after the patterning the first photoresist layer, and before the etching the polycrystalline silicon layer.

7. A method of manufacturing a semiconductor device according to claim 2 , wherein the irradiating the patterned first photoresist layer with UV rays is performed after the patterning the first photoresist layer, and before the etching the polycrystalline silicon layer.

8. A method of manufacturing a semiconductor device according to claim 1 , wherein, in forming of the second photoresist layer, resist in a dropping amount greater than a dropping amount of resist that is used in forming of the first photoresist layer is used.

9. A method of manufacturing a semiconductor device according to claim 2 , wherein, in forming of the third photoresist layer, resist in a dropping amount greater than a dropping amount of resist that is used in forming of the first photoresist layer is used.

10. A method of manufacturing a semiconductor device according to claim 1 , wherein, in forming of the second photoresist layer, resist having viscosity greater than viscosity of resist that is used in forming of the first photoresist layer is used.

11. A method of manufacturing a semiconductor device according to claim 2 , wherein, in forming of the third photoresist layer, resist having viscosity greater than viscosity of resist that is used in forming of the first photoresist layer is used.

12. A method of manufacturing a semiconductor device according to claim 1 , wherein the forming the gate electrode and the resistive film is carried out using as a mask only the first photoresist layer irradiated with the UV ray.

Assignments (3)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2016
From: SAKURAI, HITOMI
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 039014/0090 →