IP Library Granted Patent US 10,541,250
Granted Patent B2
US 10,541,250 · App. 15/195,482 · Granted Jan 21, 2020

Method for manufacturing semiconductor device

Inventors: Ryohei Kitao (Mie, JP); Atsuko Sakata (Mie, JP); Takeshi Ishizaki (Aichi, JP); Satoshi Wakatsuki (Mie, JP); Shinichi Nakao (Mie, JP); Shunsuke Ochiai (Mie, JP); Kei Watanabe (Mie, JP)
Assignee: Toshiba Memory Corporation
H01L27/11582H01L29/66833
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Quick Facts
Patent No.
US 10,541,250
App. No.
15/195,482
Granted
Jan 21, 2020
Kind
B2
Abstract

A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.

Claims (52)

1. A method of manufacturing a semiconductor device, comprising:

forming a first film including tungsten above a processing target member;

forming a second film including tungsten and carbon above the first film, the second film being thinner than the first film;

forming a third film including tungsten above the second film, the third film being thicker than the second film;

forming a fourth film including tungsten and carbon above the processing target member, the fourth film being thinner than the first film, the first film being formed above the fourth film;

forming a mask film by providing an opening part to a stacked film including the first film, the second film, the third film, and the fourth film; and

processing the processing target member by performing etching using the mask film as a mask.

2. The method according to claim 1 , wherein

a silicon oxide is exposed on an upper surface of the processing target member.

3. The method according to claim 1 , further comprising:

forming a fifth film including tungsten and nitrogen on the processing target member,

the first film being formed on the fifth film, and

the opening part being provided also to the fifth film in the forming of the mask film.

4. The method according to claim 1 , wherein

the forming of the second film and the forming of the third film are alternately performed.

5. The method according to claim 1 , wherein

the first film and the third film are lower in carbon concentration than the second film.

6. The method according to claim 1 , further comprising:

removing the mask film after the processing of the processing target member.

7. The method according to claim 1 , wherein

the second film is weaker in compressive stress than the third film.

8. The method according to claim 1 , wherein

tensile stress is caused in the second film, and compressive stress is caused in the third film.

9. A method of manufacturing a semiconductor device, comprising:

forming a first film including a first metal above a processing target member;

forming a second film including two or more types of elements out of a second metal, carbon, and boron above the first film;

forming a third film including the first metal above the second film;

forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film; and

processing the processing target member by performing etching using the mask film as a mask,

wherein

insulating films and sacrifice films are alternately stacked above a substrate in the processing target member,

the processing of the processing target member includes forming a hole penetrating the insulating films and the sacrifice films and reaching the substrate, and

the method further comprising:

forming a charge storage film on an inner surface of the hole;

forming a tunnel insulating film on a side surface of the charge storage film;

forming a semiconductor pillar on a side surface of the tunnel insulating film;

forming an opening part penetrating the insulating films and the sacrifice films after the forming of the semiconductor pillar;

removing the sacrifice films by performing etching via the opening part; and

forming electrode films in spaces from which the sacrifice films have been removed.

10. A method of manufacturing a semiconductor device, comprising:

forming a stacked body by alternately forming first layers and second layers above a substrate;

forming a first film including a first metal above the stacked body;

forming a second film above the first film, the second film including at least one of carbon and boron, and the second film including the first metal;

forming a third film including the first metal above the second film;

forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film;

forming a hole penetrating the first layers and the second layers and reaching the substrate by performing etching using the mask film as a mask;

forming a charge storage film on an inner surface of the hole;

forming a tunnel insulating film on a side surface of the charge storage film; and

forming a semiconductor pillar on a side surface of the tunnel insulating film,

the first film and the third film being lower in total concentration of carbon and boron than the second film.

11. The method according to claim 10 , further comprising:

removing the mask film after the forming of a hole.

Assignments (6)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE POSTAL CODE PREVIOUSLY RECORDED ON REEL 042910 FRAME 0321. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043747/0290 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 042910/0321 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2016
From: KITAO, RYOHEI; SAKATA, ATSUKO; ISHIZAKI, TAKESHI; WAKATSUKI, SATOSHI; NAKAO, SHINICHI; OCHIAI, SHUNSUKE; WATANABE, KEI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 039043/0943 →
Continuity (2)
Provisional Application 62272401 · Dec 29, 2015
Related Publication 20170186766A1 · Jun 29, 2017