Solid-state imaging device

1. A solid-state imaging device comprising:

a plurality of unit cells which are two-dimensionally disposed, and each of which generates a pixel signal corresponding to a light reception amount;

a plurality of vertical signal lines each of which is provided for a corresponding column of the plurality of unit cells, and transfers the corresponding pixel signal;

a plurality of comparators each of which is provided for a corresponding one of the plurality of vertical signal lines; and

a ramp signal supply circuit that supplies a common ramp signal to the plurality of comparators,

wherein

each of the plurality of comparators includes

a first differential amplifier circuit that includes a first transistor to which one of the ramp signal and the pixel signal is input through a gate of the first transistor, a second transistor to which the other of the ramp signal and the pixel signal is input through a gate of the second transistor, and an output terminal connected with a drain or a source of the second transistor, and outputting a signal corresponding to a difference between the ramp signal and the pixel signal, and

a reduction circuit for reducing fluctuations of charge accumulated in a capacitance component of the first transistor.

2. The solid-state imaging device according to claim 1 , wherein

the ramp signal is input to the gate of the first transistor,

the pixel signal is input to the gate of the second transistor, and

the reduction circuit is a voltage generation circuit that generates voltage corresponding to current flowing in the first transistor, and supplies the generated voltage to the gate of the first transistor.

3. The solid-state imaging device according to claim 2 , wherein the voltage generation circuit is a source follower circuit.

4. The solid-state imaging device according to claim 1 , wherein

the reduction circuit is a second differential amplifier circuit having a circuit configuration identical to a circuit configuration of the first differential amplifier circuit,

the ramp signal is input to the gate of the first transistor of the first differential amplifier circuit, and to a gate of the second transistor of the second differential amplifier circuit, and

the pixel signal is input to the gate of the second transistor of the first differential circuit, and to a gate of the first transistor of the second differential amplifier circuit.

5. The solid-state imaging device according to claim 1 , wherein the reduction circuit includes

a first switch capable of switching an input destination of the pixel signal to one of the first transistor and the second transistor, and

a second switch capable of switching an input destination of the ramp signal to the other of the first transistor and the second transistor.

6. The solid-state imaging device according to claim 1 , wherein each of the plurality of unit cells includes a reset transistor, a transfer transistor, a reading transistor, and a selection transistor.

7. The solid-state imaging device according to claim 1 , wherein each of the plurality of unit cells does not include a selection transistor.

8. The solid-state imaging device according to claim 1 , wherein each of the plurality of unit cells includes

a plurality of light receiving elements, and

at least one of a reset transistor, a reading transistor, and a selection transistor which are shared by the plurality of light receiving elements.