Solid-state imaging device

1. A solid-state imaging device comprising:

a plurality of pixels arrayed in a matrix;

a plurality of first latch circuits, each of which is provided so as to correspond to a different one of a plurality of first unit columns and holds first pixel data obtained by converting an analog signal into a digital signal, the analog signal being generated from a pixel located on a corresponding one of the first unit columns out of the plurality of pixels;

a first read bit line;

a plurality of first driver circuits, each of which is provided so as to correspond to a different one of the plurality of first unit columns and outputs the first pixel data to the first read bit line, the first pixel data being held in a corresponding one of the first latch circuits;

a first amplifier that amplifies a voltage of the first read bit line to generate first data;

a second latch circuit that holds the first data;

a second driver circuit; and

a column scanning circuit,

wherein the column scanning circuit sequentially outputs a plurality of the first pixel data corresponding to the plurality of first unit columns by sequentially selecting the plurality of first driver circuits and selecting the second driver circuit, and

the second driver circuit outputs the first data held in the second latch circuit to a read bit line different from the first read bit line.

2. The solid-state imaging device according to claim 1 , comprising:

a plurality of third latch circuits, each of which is provided so as to correspond to a different one of a plurality of second unit columns different from the plurality of first unit columns, and holds second pixel data obtained by converting an analog signal into a digital signal, the analog signal being generated from a pixel located on a corresponding one of the second unit columns out of the plurality of pixels;

a second read bit line; and

a plurality of third driver circuits, each of which is provided so as to correspond to a different one of the plurality of second unit columns and outputs the second pixel data to the second read bit line, the second pixel data being held in a corresponding one of the third latch circuits,

wherein the second driver circuit outputs the first data to the second read bit line.

3. The solid-state imaging device according to claim 2 , comprising:

a second amplifier that amplifies a voltage of the second read bit line to generate second data; and

an output driver that outputs the second data,

wherein the column scanning circuit sequentially outputs a plurality of the second pixel data corresponding to the plurality of second unit columns to the second amplifier by sequentially selecting the plurality of third driver circuits.

4. The solid-state imaging device according to claim 3 , wherein

the column scanning circuit sequentially outputs the first pixel data to the second amplifier.

5. The solid-state imaging device according to claim 1 , wherein

the first amplifier is activated only in a cycle in which any one of the plurality of first driver circuits is activated.

6. The solid-state imaging device according to claim 2 , wherein

the second latch circuit is further provided so as to correspond to a third unit column, and holds third pixel data obtained by converting an analog signal into a digital signal, the analog signal being generated from a pixel located on the third unit column out of the plurality of pixels,

the second driver circuit outputs the third pixel data held in the second latch circuit to the second read bit line, and

the column scanning circuit sequentially outputs a plurality of the second pixel data and the third pixel data corresponding to the plurality of second unit columns and the third unit column to the second amplifier through the second read bit line by sequentially selecting the plurality of third driver circuits and the second driver circuit.

7. The solid-state imaging device according to claim 2 , comprising m (m is an integer equal to or larger than two) segments associated with different unit column groups,

wherein each of the m segments includes the plurality of third latch circuits, the plurality of third driver circuits, the second read bit line, the second latch circuit, the second driver circuit, and the second amplifier,

the second latch circuit included in a (j−1)-th (j is an arbitrary integer from two to m) segment of the m segments holds the second data generated by the second amplifier included in a j-th segment of the m segments, the second latch circuit included in a m-th segment of the m segments holds the first data generated by the first amplifier, the output driver outputs the second data generated by the second amplifier included in a 1st segment of the m segments, and

the column scanning circuit

(1) sequentially outputs the plurality of second pixel data corresponding to a 1st unit column group of the unit column groups to the second amplifier included in the 1st segment through the second read bit line included in the 1st segment by sequentially selecting the plurality of third driver circuits included in the 1st segment,

(2) sequentially outputs the plurality of second pixel data corresponding to a j-th unit column group of the unit column groups to the second amplifier included in the 1st segment through a plurality of the second read bit lines included in segments from the j-th segment to the 1st segment by sequentially selecting the plurality of third driver circuits included in the j-th segment and selecting the second driver circuits included in segments from the 1st segment to the (j−1)-th segment, and

(3) sequentially outputs a plurality of the first pixel data corresponding to the plurality of first unit columns to the second amplifier included in the 1st segment through the first read bit line and a plurality of the second read bit lines included in segments from the m-th segment to the 1st segment by sequentially selecting the plurality of first driver circuits and selecting a plurality of the second driver circuits included in segments from the 1st segment to the m-th segment.

8. The solid-state imaging device according to claim 7 , wherein

the second amplifier included in the j-th segment is activated only in a cycle in which any one of the plurality of third driver circuits and the second driver circuit included in the j-th segment is activated, and

the first amplifier is activated only in a cycle in which any one of the plurality of first driver circuits is activated.

9. The solid-state imaging device according to claim 7 , wherein

the second latch circuit included in each segment is further provided so as to correspond to a third unit column included in a corresponding one of the unit column groups, and holds third pixel data obtained by converting an analog signal into a digital signal, the analog signal being generated from a pixel located on the third unit column out of the plurality of pixels;

the second driver circuit outputs the third pixel data held in the second latch circuit to the second read bit line; and

the column scanning circuit

(1) sequentially outputs the plurality of second pixel data corresponding to the 1st unit column group to the second amplifier included in the 1st segment through the second read bit line included in the 1st segment by sequentially selecting the plurality of third driver circuits and the second driver circuit included in the 1st segment, and

(2) sequentially outputs the plurality of second pixel data corresponding to the j-th unit column group to the second amplifier included in the 1st segment through a plurality of the second read bit lines included in segments from the j-th segment to the 1st segment by sequentially selecting the plurality of third driver circuits and the second driver circuit included in the j-th segment and selecting the second driver circuits included in segments from the 1st segment to the (j−1)-th segment.

10. The solid-state imaging device according to claim 2 , wherein

the column scanning circuit sequentially outputs the plurality of second pixel data and the plurality of first pixel data to the second amplifier in order from the pixel data of a unit column closer to the output driver to the pixel data of a unit column away from the output driver by sequentially selecting the plurality of third driver circuits and the plurality of first driver circuits in a forward direction, and

the solid-state imaging device further comprises an inversion column scanning circuit that sequentially outputs the plurality of second pixel data and the plurality of first pixel data to the second amplifier in order from the pixel data of a unit column away from the output driver to the pixel data of a unit column closer to the output driver by sequentially selecting the plurality of third driver circuits and the plurality of first driver circuits in an opposite direction to the forward direction.

11. The solid-state imaging device according to claim 2 , wherein

the plurality of third driver circuits, the plurality of first driver circuits, and the second driver circuit are disposed at a pitch equal to a pitch of the first unit columns and a pitch of the second unit columns, and

the first amplifier is disposed in a region between a region where the plurality of third driver circuits are disposed and a region where the plurality of first driver circuits are disposed.

12. The solid-state imaging device according to claim 2 , comprising:

a first circuit group; and

a second circuit group,

wherein each of the first circuit group and the second circuit group includes the plurality of third latch circuits, the plurality of third driver circuits, the second read bit line, the second amplifier, the plurality of first latch circuits, the first read bit line, the plurality of first driver circuits, the first amplifier, the second latch circuit, and the second driver circuit,

the plurality of second unit columns and first unit columns corresponding to the first circuit group are a plurality of fourth unit columns disposed at an interval of N (N is an integer equal to or larger than two) unit columns,

the plurality of second unit columns and first unit columns corresponding to the second circuit group are fifth unit columns which are disposed at the interval of the N unit columns, the fifth unit columns being different from the plurality of fourth unit columns,

the first circuit group and the second circuit group are aligned in a direction orthogonal to an arrangement direction of columns, and

in each of the first circuit group and the second circuit group,

(1) the plurality of third driver circuits, the plurality of first driver circuits, and the second driver circuit are disposed at a pitch N times the pitch of unit columns, and

(2) the first amplifier is disposed in a region between a region where the plurality of third driver circuits are disposed and a region where the plurality of first driver circuits are disposed.

13. The solid-state imaging device according to claim 11 , further comprising:

one or more first precharge circuits that are connected to the second read bit line and disposed between two adjacent ones of the third driver circuits or between the third driver circuit and the second driver circuit which are adjacent to each other; and

one or more second precharge circuits that are connected to the first read bit line and disposed between two adjacent ones of the first driver circuits or between the first driver circuit and the second driver circuit which are adjacent to each other.