IP Library Granted Patent US 10,491,117
Granted Patent B2
US 10,491,117 · App. 15/196,559 · Granted Nov 26, 2019

Soft-start circuit for buck converter control

Inventors: SangCheol Moon (Daejeon, KR); Gwanbon Koo (Bucheon-si, KR); Chenghao Jin (Bucheon-si, KR); Bonggeun Chung (Incheon, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02M3/158G01R19/04H02M1/36H02M1/44H02M3/156H02M7/04H02M7/217H02M2001/0003H02M2001/0009H02M2001/0022H02M2001/0048H02M2001/0054H02M2001/0058Y02B70/1491
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Quick Facts
Patent No.
US 10,491,117
App. No.
15/196,559
Granted
Nov 26, 2019
Kind
B2
Abstract

A buck converter includes a power switch having a first end to receive an input voltage, and a soft start circuit configured to compensate a soft start voltage during a soft start time period according to a result of comparing a feedback voltage corresponding to an output voltage of the buck converter and an input detection voltage corresponding to the input voltage. The buck converter controls switching of the power switch using the soft start voltage.

Claims (57)

1. A switch control circuit for a power switch coupled to an inductor between an input terminal and an output terminal in a converter circuit, the switch control circuit comprising:

a soft start circuit configured to compensate a soft start voltage during a soft start time period by:

comparing a feedback voltage corresponding to an output voltage of the output terminal to an input detection voltage corresponding to an input voltage of the input terminal,

causing the soft start voltage to increase at a first slope in response to the feedback voltage being lower than the input detection voltage, and

causing the soft start voltage to change according to a second slope different from the first slope in response to the feedback voltage being higher than the input detection voltage; and

a circuit configured to control switching of the power switch by using the soft start voltage and the feedback voltage during the soft start time period,

wherein the input voltage is an Alternating Current (AC) voltage, and

wherein the input detection voltage is a rectified AC voltage.

2. The switch control circuit of claim 1 , wherein the soft start circuit is configured to decrease the soft start voltage during the soft start time period when the feedback voltage is higher than the input detection voltage.

3. The switch control circuit of claim 2 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a first transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated; and

a current sink coupled to a second end of the first transistor.

4. The switch control circuit of claim 3 , wherein the soft start circuit further comprises a current source coupled to the capacitor.

5. The switch control circuit of claim 4 , wherein the soft start circuit further comprises a second transistor configured to perform switching according to the output of the comparator and coupled between the capacitor and the current source.

6. The switch control circuit of claim 1 , wherein the soft start circuit is configured to maintain the soft start voltage at a constant level during the soft start time period when the feedback voltage is higher than the input detection voltage.

7. The switch control circuit of claim 6 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated; and

a current source coupled to a second end of the transistor.

8. The switch control circuit of claim 1 , wherein the soft start circuit is configured to increase the soft start voltage at the second slope during the soft start time period when the feedback voltage is higher than the input detection voltage, wherein the first slope is greater than the second slope.

9. The switch control circuit of claim 8 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a first transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated;

a first current source coupled to a second end of the first transistor;

a second transistor configured to perform switching according to the output of the comparator and having a first end coupled to the capacitor; and

a second current source coupled to a second end of the second transistor.

10. The switch control circuit of claim 9 , wherein the first transistor and the second transistor have different channel types.

11. A buck converter comprising:

a power switch having a first end to receive an input voltage; and

a soft start circuit configured to compensate a soft start voltage during a soft start time period by:

comparing a feedback voltage corresponding to an output voltage of the buck converter and an input detection voltage corresponding to the input voltage,

causing the soft start voltage to increase at a first slope in response to the feedback voltage being lower than the input detection voltage, and

causing the soft start voltage to change at a second slope different from the first slope in response to the feedback voltage being higher than the input detection voltage,

wherein the buck converter controls switching of the power switch using the soft start voltage,

wherein the input voltage is an Alternating Current (AC) voltage, and

wherein the input detection voltage is a rectified AC voltage.

12. The buck converter of claim 11 , wherein the soft start circuit is configured to decrease the soft start voltage during the soft start time period when the feedback voltage is higher than the input detection voltage.

13. The buck converter of claim 12 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a first transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated; and

a current sink coupled to a second end of the first transistor.

14. The buck converter of claim 13 , wherein the soft start circuit further comprises a current source coupled to the capacitor.

15. The buck converter of claim 14 , wherein the soft start circuit further comprises a second transistor configured to perform switching according to the output of the comparator and coupled between the capacitor and the current source.

16. The buck converter of claim 11 , wherein the soft start circuit is configured to maintain the soft start voltage at a constant level during the soft start time period when the feedback voltage is higher than the input detection voltage.

17. The buck converter of claim 16 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated; and

a current source coupled to a second end of the transistor.

18. The buck converter of claim 11 , wherein the soft start circuit is configured to increase the soft start voltage at the second slope during the soft start time period when the feedback voltage is higher than the input detection voltage, wherein the first slope is greater than the second slope.

19. The buck converter of claim 18 , wherein the soft start circuit comprises:

a comparator configured to compare the feedback voltage and the input detection voltage;

a first transistor configured to perform switching according to an output of the comparator and having a first end coupled to a capacitor by which the soft start voltage is generated;

a first current source coupled to a second end of the first transistor;

a second transistor configured to perform switching according to the output of the comparator and having a first end coupled to the capacitor; and

a second current source coupled to a second end of the second transistor.

20. The buck converter of claim 19 , wherein the first transistor and the second transistor have different channel types.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2016
From: MOON, SANGCHEOL; KOO, GWANBON; JIN, CHENGHAO; CHUNG, BONGGEUN
To: FAIRCHILD KOREA SEMICONDUCTOR LTD
Reel/Frame 039042/0563 →
Continuity (2)
Provisional Application 62185834 · Jun 29, 2015
Related Publication 20160380541A1 · Dec 29, 2016
Cited By (1)
US 12,294,299