IP Library Granted Patent US 10,186,499
Granted Patent B2
US 10,186,499 · App. 15/199,434 · Granted Jan 22, 2019

Integrated circuit package assemblies including a chip recess

Inventors: Georg Seidemann (Landshut, DE); Klaus Reingruber (Langquaid, DE)
Assignee: Intel IP Corporation
H01L25/0657H01L23/49833H01L24/20H01L24/96H01L24/97H01L25/105H01L25/50H01L23/367H01L2224/12105H01L2224/16145H01L2224/16227H01L2224/48145H01L2224/73259H01L2224/73277H01L2225/06506H01L2225/06513H01L2225/06548H01L2225/06555H01L2225/06568H01L2225/06582H01L2225/06589H01L2225/1035H01L2225/1058H01L2225/1094H01L2924/14H01L2924/1432H01L2924/1434H01L2924/1436H01L2924/1438H01L2924/1461H01L2924/15311H01L2924/15321
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Quick Facts
Patent No.
US 10,186,499
App. No.
15/199,434
Granted
Jan 22, 2019
Kind
B2
Abstract

IC package assemblies including a molding compound in which an IC chip surface is recessed relative to the molding compound. Thickness of the IC chip may be reduced relative to its thickness during the molding process. Another IC chip, heat spreader, etc. may then occupy the resultant recess framed by the molding compound to achieve a fine stacking pitch. In some embodiments, a package-on-package (PoP) assembly includes a center-molded IC chip flip-chip-bonded to a first package substrate. A second substrate to which a second IC chip is flip-chip bonded is then electrically coupled to the first substrate by through-molding vias. Within the PoP assembly, the second IC chip may be disposed back-to-back with the center-molded IC chip so as to occupy the recess framed by the molding compound.

Claims (23)

1. An integrated circuit (IC) package assembly, comprising:

a first IC chip having a first thickness, the first IC chip including a front side having a plurality of metal features, and a back side opposite the front side;

a molding compound in contact with an edge of the first IC chip, wherein the molding compound has a second thickness that is greater than the first thickness, and wherein a sidewall of the molding compound extends from the edge of the first IC chip and frames a recess over the back side of the first IC chip;

a second IC chip at least partially within the recess, wherein an edge of the second IC chip and the sidewall of the molding compound has a separation therebetween, and wherein the second IC chip has a back side facing the back side of the first IC chip;

conductive vias through the molding compound, wherein the conductive vias have at least the second thickness;

a first package substrate coupled to the metal features by first solder features, wherein the first package substrate is further coupled to the conductive vias; and

a second package substrate coupled to a front side of the second IC chip by second solder features, wherein the second substrate is further coupled to the conductive vias by third solder features.

2. The package assembly of claim 1 , wherein the molding compound has a front side planar with the front side of the first IC chip, and a molding z-thickness is greater than the first thickness.

3. The package assembly of claim 1 , wherein the second thickness is greater than the first thickness added to a z-height of the first solder features.

4. The package assembly of claim 1 , wherein the molding compound is absent from a space between the back side of the first IC chip and the second IC chip.

5. The package assembly of claim 1 , further comprising a heat spreader disposed between the IC chips, an edge of the heat spreader separated from the sidewall of the molding compound and the heat spreader in contact with at least one of the IC chips.

6. The package assembly of claim 5 , wherein the heat spreader extends through a channel in the molding compound.

7. A system comprising the package assembly of claim 6 , and further comprising a heat sink laterally separated from the first IC chip by the molding compound and thermally coupled to the heat spreader.

8. A mobile device, comprising:

a battery; and

the (IC) package assembly of claim 1 electrically coupled to the battery.

9. The device of claim 8 , wherein at least one of the first or second IC chips includes processor circuitry.

10. The device of claim 8 , wherein at least one of the first or second IC chips includes DRAM circuitry.

11. The device of claim 8 , wherein the molding compound is absent from a space between the back side of the first IC chip and the second IC chip.

12. The device of claim 8 , further comprising a heat spreader disposed between the first and second IC chips, an edge of the heat spreader separated from the sidewall of the molding compound and the heat spreader in contact with at least one of the first and second IC chips.

13. The package assembly of claim 12 , wherein the heat spreader extends through a channel in the molding compound.

14. A system comprising the package assembly of claim 13 , and further comprising a heat sink laterally separated from the first IC chip by the molding compound and thermally coupled to the heat spreader.

15. The package assembly of claim 1 , wherein the edge of the second IC chip and the sidewall of the molding compound has a first separation therebetween, and wherein a continuous volume extends between the first separation and a second separation between the third solder features.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057061/0588 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 057254/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2016
From: SEIDEMANN, GEORG; REINGRUBER, KLAUS
To: INTEL IP CORPORATION
Reel/Frame 039294/0907 →
Continuity (1)
Related Publication 20180005991A1 · Jan 4, 2018
Cited By (2)
US 12,685,233 US 12,713,911