IP Library Granted Patent US 9,584,720
Granted Patent B2
US 9,584,720 · App. 15/206,600 · Granted Feb 28, 2017

Camera system dual-encoder architecture

Inventors: Scott Patrick Campbell (Belmont, CA); Paul Mobbs (San Francisco, CA); Balineedu Chowdary Adsumilli (San Mateo, CA); Sumit Chawla (San Carlos, CA)
Assignee: GoPro, Inc.
H04N5/23229G06T3/4015H04N5/232H04N5/2353H04N5/23212H04N5/23216H04N5/23222H04N5/23245H04N5/23254H04N5/23267H04N5/23296H04N5/247H04N5/378H04N9/045H04N9/735H04N19/102H04N19/12H04N19/164H04N19/172H04N19/1883H04N19/63H04N19/91
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Quick Facts
Patent No.
US 9,584,720
App. No.
15/206,600
Granted
Feb 28, 2017
Kind
B2
Abstract

An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.

Claims (38)

1. A camera system, comprising:

an image sensor chip configured to produce image data representative of light incident upon the image sensor chip;

an image signal processor chip (“ISP”) configured to process the image data; and

an image capture accelerator chip (“ICA”) coupled between the image sensor chip and the ISP, the image capture accelerator comprising:

an input configured to receive the image data from the image sensor chip;

a first encoder configured to encode a first portion of the image data to produce first encoded image data;

a second encoder configured to encode a second portion of the image data to produce second encoded image data; and

an output configured to output the received image data when the ICA is configured to operate in a normal mode and to output one or both of the first encoded image data and the second encoded image data when the ICA is configured to operate in an accelerated mode.

2. The camera system of claim 1 , wherein one or both of the first encoder and the second encoder comprise a wavelet encoder.

3. The camera system of claim 2 , wherein the wavelet encoder comprises an entropy encoder.

4. The camera system of claim 1 , wherein one or both of the first encoder and the second encoder comprise an H.264 encoder.

5. The camera system of claim 1 , wherein the first portion of the image data comprises a first subset of sub-band components of the image data.

6. The camera system of claim 5 , wherein the second portion of the image data comprises a second subset of sub-band components of the image data different than the first subset of sub-band components.

7. The camera system of claim 5 , wherein the first subset of sub-band components of the image data comprises a low/low sub-band component.

8. A method for capturing images by a camera system, comprising:

capturing, by an image sensor chip, light incident upon the image sensor to produce image data representative of the captured light;

receiving, by an image capture accelerator chip (“ICA”) coupled to the image sensor chip, the image data from the image sensor chip;

encoding, by a first encoder of the ICA, a first portion of the received image data to produce first encoded image data;

encoding, by a second encoder of the ICA, a second portion of the received image data to produce second encoded image data;

when the ICA is configured to operate in a normal mode, outputting the received image data; and

when the ICA is configured to operate in an accelerated mode, outputting one or both of the first encoded image data and the second encoded image data.

9. The method of claim 8 , wherein one or both of the first encoder and the second encoder comprise a wavelet encoder.

10. The method of claim 9 , wherein the wavelet encoder comprises an entropy encoder.

11. The method of claim 8 , wherein one or both of the first encoder and the second encoder comprise an H.264 encoder.

12. The method of claim 8 , wherein the first portion of the image data comprises a first subset of sub-band components of the image data.

13. The method of claim 12 , wherein the second portion of the image data comprises a second subset of sub-band components of the image data different than the first subset of sub-band components.

14. The method of claim 12 , wherein the first subset of sub-band components of the image data comprises a low/low sub-band component.

15. An image capture accelerator integrated circuit (“ICA”), comprising:

an input configured to receive the image data from the image sensor chip;

a first encoder configured to encode a first portion of the image data to produce first encoded image data;

a second encoder configured to encode a second portion of the image data to produce second encoded image data; and

an output configured to output the received image data when the ICA is configured to operate in a normal mode and to output one or both of the first encoded image data and the second encoded image data when the ICA is configured to operate in an accelerated mode.

16. The ICA of claim 15 , wherein one or both of the first encoder and the second encoder comprise a wavelet encoder.

17. The ICA of claim 16 , wherein the wavelet encoder comprises an entropy encoder.

18. The ICA of claim 15 , wherein one or both of the first encoder and the second encoder comprise an H.264 encoder.

19. The ICA of claim 15 , wherein the first portion of the image data comprises a first subset of sub-band components of the image data.

20. The ICA of claim 19 , wherein the second portion of the image data comprises a second subset of sub-band components of the image data different than the first subset of sub-band components.

21. The ICA of claim 19 , wherein the first subset of sub-band components of the image data comprises a low/low sub-band component.

Assignments (5)
SECURITY INTEREST Recorded Aug 4, 2025
From: GOPRO, INC.
To: FARALLON CAPITAL MANAGEMENT, L.L.C., AS AGENT
Reel/Frame 072340/0676 →
SECURITY INTEREST Recorded Aug 4, 2025
From: GOPRO, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 072358/0001 →
RELEASE OF PATENT SECURITY INTEREST Recorded Jan 25, 2021
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: GOPRO, INC.
Reel/Frame 055106/0434 →
SECURITY INTEREST Recorded Dec 16, 2016
From: GOPRO, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 040996/0652 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2016
From: CAMPBELL, SCOTT PATRICK; MOBBS, PAUL; ADSUMILLI, BALINEEDU CHOWDARY; CHAWLA, SUMIT
To: GOPRO, INC.
Reel/Frame 039144/0672 →
Continuity (4)
Continuation 15049013 · Feb 20, 2016
Continuation 14488283 · Sep 17, 2014
Provisional Application 61885412 · Oct 1, 2013
Related Publication 20160323510A1 · Nov 3, 2016