Class D audio amplifier and method for reading a current supplied by the amplifier
A circuit includes a final stage that includes an H-bridge comprising first and second half-bridges. A read circuit is configured to read a load current supplied by a class-D audio-amplifier to a load. The read circuit is configured for estimating the load current by reading a current at an output by the first or second half-bridge by measuring a drain-to-source voltage during an ON period of a power transistor of the H-bridge. A sensing circuit is configured to detect a first drain-to-source voltage from a transistor of the first half-bridge and a second drain-to-source voltage from a corresponding transistor of the second half-bridge. The sensing circuit is also configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage and to perform an averaging operation on the difference to obtain a sense voltage value to be supplied to an analog-to-digital converter.
1. A circuit comprising:
a final stage of a class-D amplifier that includes an H-bridge comprising a first half-bridge and a second half-bridge; and
a sensing circuit configured to estimate a load current flowing through a load coupled to the H-bridge by
sensing a first drain-to-source voltage of a first transistor of the first half-bridge,
sensing a second drain-to-source voltage of a first transistor of the second half-bridge,
computing a difference between the first drain-to-source voltage and the second drain-to-source voltage, and
performing an averaging operation on the difference to obtain a sense voltage value.
2. The circuit according to claim 1 , wherein the first transistor of the first half-bridge comprises a low-side transistor, and the first transistor of the second half-bridge comprises a low-side transistor.
3. The circuit according to claim 1 , wherein the sensing circuit comprises a differential amplifier coupled to the first transistor of the first half-bridge and the first transistor of the second half-bridge, the differential amplifier being configured to compute the difference between the first drain-to-source voltage and the second drain-to-source voltage.
4. The circuit according to claim 3 , wherein the sensing circuit further comprises a low-pass filter coupled to an output of the differential amplifier, the low-pass filter being configured to perform the averaging operation on the difference to obtain the sense voltage value.
5. The circuit according to claim 1 , wherein the sensing circuit comprises respective protection switches set between drain and source nodes of the first transistors of the first half-bridge and of the second half-bridge and inputs of a differential amplifier of the sensing circuit, the differential amplifier configured to compute the difference between the first drain-to-source voltage and the second drain-to-source voltage.
6. The circuit according to claim 1 , wherein the sensing circuit comprises a sensing network that includes an auxiliary transistor with a gate and a drain, wherein
the gate of the auxiliary transistor is coupled to a gate of the first transistor of the first half-bridge and a drain of the auxiliary transistor is coupled to a drain of the first transistor of the first half-bridge.
7. The circuit according to claim 6 , wherein the sensing network further comprises a sense resistance between a source of the auxiliary transistor and a ground of the first half-bridge.
8. The circuit according to claim 7 , wherein the sense resistance is sized so that the sense resistance has a higher value than a switch-on resistance of the auxiliary transistor, such as to render a sum of the switch-on resistance of the auxiliary transistor and of the sense resistance approximately equal to the sense resistance.
9. The circuit according to claim 7 , wherein the sense resistance is sized so that the sense resistance has a lower value than a switch-on resistance of the auxiliary transistor, such as to render a sum of a switch-on resistance of the auxiliary transistor and of the sense resistance approximately equal to the switch-on resistance.
10. A method for estimating a load current supplied by a class-D audio amplifier to a load, the method comprising:
sensing a first drain-to-source voltage of a first transistor of a first half-bridge of an H-bridge of a final stage of the class-D audio amplifier;
sensing a second drain-to-source voltage of a first transistor of a second half-bridge of the H-bridge of the final stage of the class-D audio amplifier;
computing a difference between the first drain-to-source voltage and the second drain-to-source voltage; and
performing an averaging operation on the difference to obtain a sense voltage value.
11. The method according to claim 10 , further comprising supplying the sense voltage value to an analog-to-digital converter (ADC).
12. A circuit comprising
a final stage of a class D audio amplifier that includes an H-bridge comprising a first half-bridge and a second half-bridge; and
a sensing circuit comprising a differential amplifier and a low-pass filter, the sensing circuit configured to detect a first drain-to-source voltage from a first transistor of the first half-bridge and a second drain-to-source voltage from a first transistor of the second half-bridge, wherein the differential amplifier is configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage, and wherein the low-pass filter is configured to perform an averaging operation on the difference to obtain a sense voltage value.
13. The circuit according to claim 12 , wherein the sensing circuit comprises respective protection switches set between drain and source nodes of the first transistors of the first half-bridge and of the second half-bridge and inputs of the differential amplifier.
14. The circuit according to claim 12 , wherein the sensing circuit comprises a sensing network that includes an auxiliary transistor with a gate and a drain, wherein the gate of the auxiliary transistor is coupled to a gate of the first transistor of the first half-bridge and wherein a drain of the auxiliary transistor is coupled to a drain of the first transistor of the first half-bridge.
15. The circuit according to claim 14 , wherein the sensing circuit further comprises a sense resistance between a source of the auxiliary transistor and ground of the first half-bridge.
16. The circuit according to claim 15 , wherein the sense resistance is sized so that the sense resistance has a higher value than a switch-on resistance of the auxiliary transistor, such as to render a sum of the switch-on resistance of the auxiliary transistor and of the sense resistance approximately equal to the sense resistance.
17. The circuit according to claim 16 , wherein the sense resistance is sized so that the sense resistance has a lower value than a switch-on resistance of the auxiliary transistor, such as to render a sum of a switch-on resistance of the auxiliary transistor and of the sense resistance approximately equal to the switch-on resistance.
18. The circuit according to claim 3 , wherein the differential amplifier comprises a low-pass filter configured to perform the averaging operation on the difference to obtain the sense voltage value.
19. The circuit according to claim 1 , further comprising an analog-to-digital converter (ADC) configured to receive the sensed voltage value.
20. A method comprising:
sensing a first current flowing through a first transistor of a first half-bridge of an H-bridge;
sensing a second current flowing through a first transistor of a second half-bridge of the H-bridge;
computing a difference between the first current and the second current; and
performing an averaging operation on the difference, wherein:
sensing the first current comprises sensing a first drain-to-source voltage of the first transistor of the first half-bridge;
sensing the second current comprises sensing a second drain-to-source voltage of the first transistor of the second half-bridge; and
computing the difference between the first current and the second current comprises computing a difference between the first drain-to-source voltage and the second drain-to-source voltage.