Implementing backdrilling elimination utilizing anti-electroplate coating
A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.
1. A structure for implementing enhanced via creation without creating a via barrel stub during printed circuit board (PCB) manufacturing comprising:
a printed circuit board (PCB);
said printed circuit board (PCB) having an internal conductive trace;
a via extending through the printed circuit board (PCB) and the internal conductive trace; and
an anti-electroplate coating covering the walls of the via below the signal trace; said anti-electroplate coating formed of a chemically resistant polymer having a selected thickness of approximately 0.2 μm, said anti-electroplate coating remaining on the via walls, preventing PCB plating from PCB plating process from taking hold on the covered via walls, said anti-electroplate coating eliminating via barrel stub creation during PCB manufacturing.
2. The structure as recited in claim 1 wherein said anti-electroplate coating is formed of a hydrophobic polymer.
3. The structure as recited in claim 1 wherein said anti-electroplate coating is formed of polytetrafluoroethylene (PTFE).
4. The structure as recited in claim 3 wherein said anti-electroplate coating is applied using vapor deposition onto the walls of the via below the signal trace.
5. The structure as recited in claim 1 wherein said anti-electroplate coating has a selected thickness less than 0.5 μm.