IP Library Granted Patent US 10,453,853
Granted Patent B2
US 10,453,853 · App. 15/222,092 · Granted Oct 22, 2019

Short circuit reduction in a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate

Inventors: Christer Karlsson (Linköping, SE); Olle Jonny Hagel (Linköping, SE); Jakob Nilsson (Linköping, SE); Per Bröms (Linköping, SE)
Assignee: THIN FILM ELECTRONICS ASA
H01L27/11507G11B9/02G11C11/161H01L23/562H01L27/0248H01L27/11502H01L27/1203H01L28/40H01L28/55H01L43/02H01L43/12H01L51/0591G11C11/22H01L28/75H01L2924/0002
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Quick Facts
Patent No.
US 10,453,853
App. No.
15/222,092
Granted
Oct 22, 2019
Kind
B2
Abstract

A ferroelectric memory cell ( 1 ) and a memory device ( 100 ) comprising one or more such cells ( 1 ). The ferroelectric memory cell comprises a stack ( 4 ) of layers arranged on a flexible substrate ( 3 ). Said stack comprises an electrically active part ( 4 a ) and a protective layer ( 11 ) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer ( 5 ) and a top electrode layer ( 9 ) and at least one ferroelectric memory material layer ( 7 ) between said electrodes. The stack further comprises a buffer layer ( 13 ) arranged between the top electrode layer ( 9 ) and the protective layer ( 11 ). The buffer layer ( 13 ) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer ( 11 ) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part ( 4 a ), thereby reducing the risk of short circuit to occur between the electrodes.

Claims (15)

1. A method of using a material with a glass transition temperature that is lower than 30 degrees C. for forming a buffer layer for reduction of short circuits in a ferroelectric memory cell, the method comprising:

arranging the buffer layer having the glass transition temperature that is lower than 30 degrees C. between a top electrode layer and a protective layer in the ferroelectric memory cell; and

arranging a stack of layers on a flexible substrate, wherein said stack comprises an electrically active part and the protective layer for protecting the electrically active part against scratches and abrasion, wherein said electrically active part comprises a bottom electrode layer and the top electrode layer and at least one ferroelectric memory material layer between said electrode layers.

2. A method for producing a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate, said method comprising:

providing said substrate and arranged thereon an electrically active part of said stack, the electrically active part comprising a bottom electrode layer and a top electrode layer separated by at least one ferroelectric memory material layer;

providing a protective layer for protecting the electrically active part against scratches and abrasion;

providing a buffer layer on top of said electrically active part of said stack before providing the protective layer, the buffer layer being adapted for at least partially absorbing a lateral dimensional change occurring in the protective layer and thus preventing said dimensional change from being transferred to the electrically active part by being of a coherent material and having such layer thickness that a lateral dimensional deformation in a top portion of the buffer layer facing the protective layer results in substantially less lateral dimensional deformation in a bottom portion facing the electrically active part, when said lateral dimensional deformation in the upper part is caused by the lateral dimensional change of the protective layer, the difference in lateral deformation between the top and bottom portions corresponding to absorbed lateral dimensional change.

3. The method as claimed in claim 2 , wherein providing the protective layer involves depositing a layer in a fluid form and subsequently hardening the deposited layer, such as by curing.

4. The method as claimed in claim 2 , further comprising providing the electrically active part and/or the buffer layer by printing.

5. A method for producing a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate, said method comprising:

providing said substrate and arranged thereon an electrically active part of said stack, the electrically active part comprising a bottom electrode layer and a top electrode layer separated by at least one ferroelectric memory material layer;

providing a protective layer fluid material on top of the electrically active part;

hardening the protective layer fluid material into a protective hard layer; and

electrically operating the electrically active part after providing the protective layer fluid material but before the step of hardening.

6. The method as claimed in claim 5 further comprising providing the electrically active part by printing.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2025
From: XEROX CORPORATION
To: GENESEE VALLEY INNOVATIONS, LLC
Reel/Frame 073562/0677 →
SECOND LIEN NOTES PATENT SECURITY AGREEMENT Recorded Jul 2, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 071785/0550 →
FIRST LIEN NOTES PATENT SECURITY AGREEMENT Recorded Apr 11, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 070824/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RF 064095/0455 Recorded Feb 13, 2024
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: XEROX CORPORATION
Reel/Frame 066566/0438 →
SECURITY INTEREST Recorded Feb 13, 2024
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066741/0001 →
SECURITY INTEREST Recorded Nov 20, 2023
From: XEROX CORPORATION
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 065628/0019 →
SECURITY INTEREST Recorded Jun 28, 2023
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 064095/0455 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2023
From: THIN FILM ELECTRONICS ASA
To: XEROX CORPORATION
Reel/Frame 064033/0554 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2016
From: KARLSSON, CHRISTER; HAGEL, OLLE JONNY; NILSSON, JAKOB; BROMS, PER
To: THIN FILMS ELECTRONICS ASA
Reel/Frame 039511/0151 →
Continuity (2)
Division 14128011
Related Publication 20160336334A1 · Nov 17, 2016