IP Library Granted Patent US 10,582,854
Granted Patent B2
US 10,582,854 · App. 15/229,600 · Granted Mar 10, 2020

Temperature sensor for measuring thermistor resistance

Inventors: Raymond Liou (Cupertino, CA); Arshan Aga (Mountain View, CA); Steve Fang (Sunnyvale, CA)
Assignee: Vital Connect, Inc.
A61B5/0008A61B5/01G01K1/024G01K7/24A61B2562/0276
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Quick Facts
Patent No.
US 10,582,854
App. No.
15/229,600
Granted
Mar 10, 2020
Kind
B2
Abstract

A method and system for determining thermistor resistance have been disclosed. The method comprises providing a temperature sensor network within a wireless sensor device, wherein the temperature sensor network includes a driver device and a receiver device, coupling the driver device to the receiver device using a dual bond wire system, determining at least one output voltage using at least one input current flowing through the dual bond wire system, and determining the thermistor resistance using the at least one output voltage. The system comprises a wireless sensor device including a temperature sensor network that comprises driver and receiver devices, and a dual bond wire system that couples the driver device to the receiver device, wherein at least one output voltage is determined using at least one input current flowing through the dual bond wire system, further wherein the thermistor resistance is determined using the at least one output voltage.

Claims (41)

1. A method for determining thermistor resistance, the method comprising:

providing a temperature sensor network within a wireless sensor device, wherein the temperature sensor network includes a driver device and a receiver device;

coupling the driver device to the receiver device using a dual bond wire system;

separating the dual bond wire system into a first set of bond wires and a second set of bond wires;

connecting each of the first set of bond wires and the second set of bond wires between a pin of a chip package and a pad on a chip die utilizing two pads per pin, wherein the first and second set of bond wires connect to the same pin of the chip package of the temperature sensor;

sending current through the first set of bond wires of the dual-bond wire;

determining at least one output voltage using at least one input current flowing through the dual bond wire system excluding the voltage through the first set of bond wires;

amplifying the at least one output voltage;

dithering the at least one amplified output voltage by applying a plurality of small voltages to the at least one amplified output voltage wherein the plurality of small voltages cover a range of a predetermined least significant bit (LSB) of an analog-to-digital converter (ADC) used for digitization; and

determining the thermistor resistance using the at least one output voltage.

2. The method of claim 1 , wherein the determining of the least one output voltage is done prior to digitization by the analog-to-digital converter (ADC) coupled to the receiver device.

3. The method of claim 1 , wherein the dual bond wire system comprises a first set of bond wires coupled to the driver device and a second set of bond wires coupled to the receiver device, further wherein the at least one input current passes through the first set of bond wires but does not pass through the second set of bond wires.

4. The method of claim 3 , wherein one of the first set of bond wires is coupled to one of the second set of bond wires and the other of the first set of bond wires is coupled to the other of the second set of bond wires.

5. The method of claim 3 , further comprising:

determining an input voltage using a plurality of switches across the first set of bond wires and measuring an offset voltage across the second set of bond wires.

6. The method of claim 5 , wherein the plurality of switches comprises a first switch, a second switch, and a third switch.

7. The method of claim 6 , wherein the input voltage comprises a first input voltage and a second input voltage.

8. The method of claim 7 , further comprising:

determining the first input voltage when each of the first switch, the second switch, and the third switch are turned off; and

determining the second input voltage when both the first switch and the third switch are turned on, and when the second switch is turned off.

9. The method of claim 8 , wherein the at least one output voltage comprises a first output voltage and a second output voltage.

10. The method of claim 9 , wherein the first output voltage is determined using the first input voltage, the offset voltage, and a gain of the receiver device and the second output voltage is determined using the second input voltage, the offset voltage, and the gain of the receiver device.

11. The method of claim 6 , wherein the input voltage comprises a first input voltage, a second input voltage, a third input voltage, and a fourth input voltage.

12. The method of claim 11 , further comprising:

determining the first input voltage when each of the first switch, the second switch, and the third switch are turned off;

determining the second input voltage when the first switch is turned on, and when both the second switch and the third switch are turned off;

determining the third input voltage when the second switch is turned on, and when both the first switch and the third switch are turned off; and

determining the fourth input voltage when both the first switch and the third switch are turned on, and when the second switch is turned off.

13. The method of claim 12 , wherein the at least one output voltage comprises a first output voltage, a second output voltage, a third output voltage, and a fourth output voltage.

14. The method of claim 13 , wherein the first output voltage is determined using the first input voltage, the offset voltage, and a gain of the receiver device, the second output voltage is determined using the second input voltage, the offset voltage, and the gain of the receiver device, the third output voltage is determined using the third input voltage, the offset voltage, and the gain of the receiver device, and the fourth output voltage is determined using the fourth input voltage, the offset voltage, and the gain of the receiver device.

15. The method of claim 1 , wherein the predetermined LSB is 1 LSB of the ADC.

16. A system for determining thermistor resistance, the system comprising:

a temperature sensor network within a wireless sensor device, wherein the temperature sensor network includes a driver device and a receiver device;

a dual bond wire system that couples the driver device to the receiver device,

wherein the dual bond wire system includes a first set of bond wires and a second set of bond wires,

wherein the first set of bond wires and the second set of bond wires are connected between a pin of a chip package and a pad on a chip die utilizing two pads per pin, wherein the first and second set of bond wires connect to the same pin of the chip package of the temperature sensor, and

wherein the driver device sends current through the first set of bond wires of the dual-bond wire, and the receiver device determines at least one output voltage using at least one input current flowing through the dual bond wire system excluding the voltage through the first set of bond wires;

an amplifier unit, wherein the amplifier unit amplifies the at least one output voltage; and

a dithering device, wherein the dithering device dithers the at least one amplified output voltage by applying a plurality of small voltages to the at least one amplified output voltage wherein the plurality of small voltages cover a range of a predetermined least significant bit (LSB) of an analog-to-digital converter (ADC) used for digitization;

wherein the thermistor resistance is determined using the at least one output voltage.

17. The system of claim 16 , wherein the dual bond wire system comprises a first set of bond wires coupled to the driver device and a second set of bond wires coupled to the receiver device, further wherein the at least one input current passes through the first set of bond wires but does not pass through the second set of bond wires.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jul 5, 2024
From: INNOVATUS LIFE SCIENCES LENDING FUND I, LP
To: VITAL CONNECT, INC.
Reel/Frame 068146/0132 →
SECURITY INTEREST Recorded Jul 5, 2024
From: VITAL CONNECT, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0160 →
SECURITY INTEREST Recorded Jan 8, 2021
From: VITAL CONNECT, INC.
To: INNOVATUS LIFE SCIENCES LENDING FUND I, LP
Reel/Frame 054941/0651 →
RELEASE OF SECURITY INTEREST Recorded Jan 8, 2021
From: OXFORD FINANCE LLC
To: VITAL CONNECT, INC.
Reel/Frame 054941/0743 →
SECURITY INTEREST Recorded Apr 9, 2020
From: VITAL CONNECT, INC.
To: OXFORD FINANCE LLC
Reel/Frame 052354/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2016
From: LIOU, RAYMOND; AGA, ARSHAN; FANG, STEVE
To: VITAL CONNECT, INC.
Reel/Frame 039354/0789 →
Continuity (1)
Related Publication 20180035889A1 · Feb 8, 2018
Cited By (6)
US 1,072,837 US 1,119,639 US 1,124,917 US 12,364,403 US 12,521,021 US 12,521,039