IP Library Granted Patent US 9,825,171
Granted Patent B2
US 9,825,171 · App. 15/232,343 · Granted Nov 21, 2017

Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device

Inventors: Hidenobu Fukutome (Kawasaki, JP); Tomohiro Kubo (Kawasaki, JP)
Assignee: FUJITSU SEMICONDUCTOR LIMITED
H01L29/7848H01L21/28518H01L21/76264H01L22/14H01L29/045H01L29/0847H01L29/161H01L29/165H01L29/41758H01L29/45H01L29/66636H01L21/26513H01L21/30608
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Quick Facts
Patent No.
US 9,825,171
App. No.
15/232,343
Granted
Nov 21, 2017
Kind
B2
Abstract

A semiconductor device has: a silicon (semiconductor) substrate; a gate insulating film and a gate electrode, which are formed on the silicon substrate in this order; and source/drain material layers formed in recesses (holes) in the silicon substrate, the recesses being located beside the gate electrode. Here, each of side surfaces of the recesses, which are closer to the gate electrode, is constituted of at least one crystal plane of the silicon substrate.

Claims (75)

1. A semiconductor device comprising:

a silicon substrate;

a gate insulating film formed on the silicon substrate;

a gate electrode formed on the gate insulating film;

a source/drain region formed in the silicon substrate;

a SiGe layer formed in a hole in the source/drain region;

a sidewall formed on the side of the gate electrode,

an insulating film formed over the gate electrode and the SiGe layer;

a conductive plug formed in the insulating film and electrically connected to the SiGe layer, wherein

a first side surface of the hole is located under the sidewall,

the first side surface includes two crystal planes,

a cross-sectional shape of the first side surface is concave,

at least one of the two crystal planes of the first side surface is defined by a (111) plane of the silicon substrate,

an upper surface of the SiGe layer is located higher than an interface between the silicon substrate and the gate insulating film,

a silicide layer formed over the SiGe layer, and

a second side surface of the hole that faces the first side surface is composed of the silicon substrate.

2. The semiconductor device according to claim 1 , wherein

one of the two crystal planes is connected to the surface of the silicon substrate, and another of the two crystal planes is connected to a bottom surface of the hole.

3. The semiconductor device according to claim 1 , further comprising:

a silicide layer formed between the SiGe layer and the conductive plug,

wherein a bottom surface of the silicide layer is located higher than an interface between the silicon substrate and the gate insulating film.

4. The semiconductor device according to claim 1 , wherein

the second side surface includes two crystal planes, and

at least one of the two crystal planes of the second side surface is defined by a (111) plane of the silicon substrate.

5. The semiconductor device according to claim 1 , wherein the SiGe layer has a Ge concentration of 3 to 30%.

6. A semiconductor device comprising:

a silicon substrate;

a gate insulating film formed on the silicon substrate;

a gate electrode formed on the gate insulating film;

a source/drain region formed in the silicon substrate;

a SiGe layer formed in a hole in the source/drain region;

a sidewall formed on the side of the gate electrode,

an insulating film formed over the gate electrode and the SiGe layer;

a conductive plug formed in the insulating film and electrically connected to the SiGe layer, wherein

a first side surface of the hole is located under the sidewall,

the first side surface includes two crystal planes,

a cross-sectional shape of the first side surface is concave,

the two crystal planes of the first side surface are defined by a (111) plane of the silicon substrate,

an upper surface of the SiGe layer is located higher than an interface between the silicon substrate and the gate insulating film,

a silicide layer formed over the SiGe layer, and

a second side surface of the hole that faces the first side surface is composed of the silicon substrate.

7. The semiconductor device according to claim 6 , wherein

One of the two crystal planes is connected to the surface of the silicon substrate, and another of the two crystal planes is connected to a bottom surface of the hole.

8. The semiconductor device according to claim 6 , further comprising:

a silicide layer formed between the SiGe layer and the conductive plug,

wherein a bottom surface of the silicide layer is located higher than an interface between the silicon substrate and the gate insulating film.

9. The semiconductor device according to claim 6 , wherein

the second side surface includes two crystal planes, and

the two crystal planes of the second side surface are defined by a (111) plane of the silicon substrate.

10. The semiconductor device according to claim 6 , wherein the SiGe layer has a Ge concentration of 3 to 30%.

11. A semiconductor device comprising:

a silicon substrate;

a gate insulating film formed on the silicon substrate;

a gate electrode formed on the gate insulating film;

a source/drain region formed in the silicon substrate;

a SiGe layer formed in a hole in the source/drain region;

a sidewall formed on the side of the gate electrode,

an insulating film formed over the gate electrode and the SiGe layer;

a conductive plug formed in the insulating film and electrically connected to the SiGe layer, wherein

a first side surface of the hole is located under the sidewall,

the first side surface includes two crystal planes,

a cross-sectional shape of the first side surface is concave,

the two crystal planes of the first side surface are defined substantially by a (111) plane of the silicon substrate,

an upper surface of the SiGe layer is located higher than an interface between the silicon substrate and the gate insulating film,

a silicide layer formed over the SiGe layer, and

a second side surface of the hole that faces the first side surface is composed of the silicon substrate.

12. The semiconductor device according to claim 11 , wherein

One of the two crystal planes is connected to the surface of the silicon substrate, and another of the two crystal planes is connected to a bottom surface of the hole.

13. The semiconductor device according to claim 11 , further comprising:

a silicide layer formed between the SiGe layer and the conductive plug,

wherein a bottom surface of the silicide layer is located higher than an interface between the silicon substrate and the gate insulating film.

14. The semiconductor device according to claim 11 , wherein

the second side surface includes two crystal planes, and

the two crystal planes of the second side surface are defined substantially by a (111) plane of the silicon substrate.

15. The semiconductor device according to claim 11 , wherein the SiGe layer has a Ge concentration of 3 to 30%.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
MERGER Recorded May 24, 2023
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU LIMITED
Reel/Frame 064221/0545 →
CHANGE OF NAME AND CHANGE OF ADDRESS Recorded Jul 16, 2020
From: AIZU FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053481/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: AIZU FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 053209/0468 →
CHANGE OF ADDRESS Recorded Jul 28, 2017
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 043364/0390 →
Priority Claims (1)
JP 2004-187053 · Jun 24, 2004 · national
Continuity (4)
Division 14665969 · Mar 23, 2015
Division 12003100 · Dec 20, 2007
Division 11009011 · Dec 13, 2004
Related Publication 20160351714A1 · Dec 1, 2016