High-performance key-value store using a coherent attached bus
View Patent ↗An infrastructure for servicing remote direct memory access (RDMA) requests without the need to pin memory and/or register memory for access by only a single RDMA adapter. Rather, RDMA requests can be coherently serviced from memory accessible to multiple adapters, and that memory can be flexibly managed (such as by swapping it out of main memory or moving it around within main memory). This coherent servicing of RDMA requests is achieved through the use of a coherent attached bus connecting the RDMA adapters to main memory that owns the address space.
1. A method for use with a key value (KV) store server computer including a set of remote direct access adapter(s), a coherent accelerator processor interface (CAPI) and a shared memory, the method comprising:
storing, in the shared memory, a first KV data store including a plurality of KV data pairs that includes a first KV data pair;
creating, by the CAPI, a first user space process corresponding to a first KV data store;
allocating, by the CAPI, a first user process address space in the shared memory for the first user space process;
receiving, by from a first user device, over a communication network and by a first remote direct memory access (RDMA) adapter of the CAPI, a user request to access the first KV data pair including the key for the first KV data pair;
responsive to the receipt of the request, determining, by the CAPI, that the first KV data pair is stored in the first user process address space; and
responsive to the determination that the first KV data pair is stored in the first user process address space, retrieving, by the first RDMA adapter, a first value corresponding to the key for the first KV data pair from the first user process address space in the shared memory; and
sending, by the first RDMA adapter of the CAPI, over the communication network and to the first user, the first value.
2. The method of claim 1 further comprising
storing, in the shared memory, a plurality of KV data stores; and
for each given KV data store of the plurality of KV data stores:
creating, by the CAPI, a respectively corresponding user space process for the given KV data store in the shared memory, and
allocating, by the CAPI, a user process address space in the shared memory for the user space process corresponding to the given KV data store.
3. The method of claim 1 wherein:
retrieving of the first KV data pair is performed in a direct manner; and
the retrieving of the first KV data pair is performed in a coherent manner.
4. A computer program product (CPP) for use with a key value (KV) store server computer including a set of remote direct access adapter(s), a coherent accelerator processor interface (CAPI) and a shared memory, the method comprising:
a non-transitory machine readable storage device; and
computer code stored on the machine readable storage device, with the computer code including instructions for causing a processor(s) set to perform operations including the following:
storing, in the shared memory, a first KV data store including a plurality of KV data pairs that includes a first KV data pair,
creating, by the CAPI, a first user space process corresponding to a first KV data store,
allocating, by the CAPI, a first user process address space in the shared memory for the first user space process,
receiving, by from a first user device, over a communication network and by a first remote direct memory access (RDMA) adapter of the CAPI, a user request to access the first KV data pair including the key for the first KV data pair,
responsive to the receipt of the request, determining, by the CAPI, that the first KV data pair is stored in the first user process address space,
responsive to the determination that the first KV data pair is stored in the first user process address space, retrieving, by the first RDMA adapter, a first value corresponding to the key for the first KV data pair from the first user process address space in the shared memory, and
sending, by the first RDMA adapter of the CAPI, over the communication network and to the first user, the first value.
5. The CPP of claim 4 wherein the computer code further includes instructions for causing the processor(s) set to perform the following operations:
storing, in the shared memory, a plurality of KV data stores; and
for each given KV data store of the plurality of KV data stores:
creating, by the CAPI, a respectively corresponding user space process for the given KV data store in the shared memory, and
allocating, by the CAPI, a user process address space in the shared memory for the user space process corresponding to the given KV data store.
6. The CPP of claim 4 wherein:
retrieving of the first KV data pair is performed in a direct manner; and
the retrieving of the first KV data pair is performed in a coherent manner.
7. A computer system (CS) for use with a key value (KV) store server computer including a set of remote direct access adapter(s), a coherent accelerator processor interface (CAPI) and a shared memory, the CS comprising:
a processor(s) set;
a machine readable storage device; and
computer code stored on the machine readable storage device, with the computer code including instructions for causing the processor(s) set to perform operations including the following:
storing, in the shared memory, a first KV data store including a plurality of KV data pairs that includes a first KV data pair,
creating, by the CAPI, a first user space process corresponding to a first KV data store,
allocating, by the CAPI, a first user process address space in the shared memory for the first user space process,
receiving, by from a first user device, over a communication network and by a first remote direct memory access (RDMA) adapter of the CAPI, a user request to access the first KV data pair including the key for the first KV data pair,
responsive to the receipt of the request, determining, by the CAPI, that the first KV data pair is stored in the first user process address space,
responsive to the determination that the first KV data pair is stored in the first user process address space, retrieving, by the first RDMA adapter, a first value corresponding to the key for the first KV data pair from the first user process address space in the shared memory, and
sending, by the first RDMA adapter of the CAPI, over the communication network and to the first user, the first value.
8. The CS of claim 7 wherein the computer code further includes instructions for causing the processor(s) set to perform the following operations:
storing, in the shared memory, a plurality of KV data stores; and
for each given KV data store of the plurality of KV data stores:
creating, by the CAPI, a respectively corresponding user space process for the given KV data store in the shared memory, and
allocating, by the CAPI, a user process address space in the shared memory for the user space process corresponding to the given KV data store.
9. The CS of claim 7 wherein:
retrieving of the first KV data pair is performed in a direct manner; and
the retrieving of the first KV data pair is performed in a coherent manner.