System and method for reducing power consumption of memory
Systems and methods for reducing problems and disadvantages associated with power consumption in memory devices are disclosed. In accordance with one embodiment of the present disclosure, a method for improving performance and reducing power consumption in memory may include tracking whether individual units of a memory system are active or inactive. The method may also include placing inactive individual units of the memory system in a self-refresh mode, such that the inactive individual units self-refresh their contents. The method may further include placing active individual units of the memory system in a command-based refresh mode, such that the active individual units are refreshed in response to a received command to refresh their contents.
1. A method for improving performance and reducing power consumption in a memory hardware system, comprising:
tracking, by a memory controller, whether individual units of the memory system are active or inactive, wherein an inactive individual unit is an individual unit that is in use, but not currently being accessed;
placing, by the memory controller, inactive individual units of the memory system in a self-refresh mode, such that the inactive individual units self-refresh their contents;
filtering, by the memory controller, memory controller commands generated upstream of the memory controller, the filtering including:
determining that a first memory controller command is directed to a first inactive individual unit of the memory system that is in a refresh interval, and in response, delaying the first memory controller command to the inactive individual unit of the memory system to prevent an internal self-refresh conflict with the first memory controller command;
determining that a second memory controller command is directed to a second inactive individual unit of the memory system that is not in a refresh interval, and in response, determining that the second memory controller command is an explicit refresh command;
in response to determining that the second memory controller command is the explicit refresh command, blocking the explicit refresh command to the second inactive individual unit of the memory system placed in the self-refresh mode; and
placing, by the memory controller, active individual units of the memory system in a command-based refresh mode, such that the active individual units are refreshed in response to a received command to refresh their contents.
2. A method according to claim 1 , wherein an individual unit of the memory system comprises one of a block, a page, a bank, and a rank.
3. A method according to claim 1 , wherein:
each individual unit of the memory system comprises a page;
tracking whether individual units of the memory system are active or inactive includes tracking whether individual pages are active or inactive; and
placing inactive individual units of the memory system in a self-refresh mode includes placing banks having only inactive pages in a self-refresh mode, such that such banks self-refresh their contents.
4. A method according to claim 1 , further comprising setting at least one variable indicating which individual units of the memory system are to be placed in the self-refresh mode, and which individual units of the memory system are to be placed in the command-based refresh mode.
5. A method according to claim 4 , wherein the at least one variable is stored in a table such that an entry of the table is associated with an individual unit of the memory system and indicates whether such individual unit of the memory system is to be placed in self-refresh mode or command-based refresh mode.
6. A method according to claim 4 , wherein the at least one variable indicates a fraction of the individual units of the memory system to be placed in self-refresh mode.
7. A method according to claim 6 , wherein the at least one variable is stored as a field in a mode register of the memory system.
8. An information handling system, comprising:
a processor;
a memory system communicatively coupled to the processor and having:
individual units for storage of data; and
a memory controller communicatively coupled to the individual units and configured to:
track whether the individual units are active or inactive, wherein an inactive individual unit is an individual unit that is in use, but not currently being accessed;
place inactive individual units in a self-refresh mode, such that the inactive individual units self-refresh their contents;
filter memory controller commands generated upstream of the memory controller, the filtering including:
determining that a first memory controller command is directed to a first inactive individual unit of the memory system that is in a refresh interval, and in response, delaying the first memory controller command to the inactive individual unit of the memory system to prevent an internal self-refresh conflict with the first memory controller command;
determining that a second memory controller command is directed to a second inactive individual unit of the memory system that is not in a refresh interval, and in response, determining that the second memory controller command is an explicit refresh command;
in response to determining that the second memory controller command is the explicit refresh command, blocking the explicit refresh command to the second inactive individual unit of the memory system placed in the self-refresh mode; and
place active individual units in a command-based refresh mode, such that the active individual units are refreshed in response to a received command to refresh their contents.
9. An information handling system according to claim 8 , wherein an individual unit of the memory system comprises one of a block, a page, a bank, and a rank.
10. An information handling system according to claim 8 , wherein:
each individual unit comprises a page;
tracking whether individual units are active or inactive includes tracking whether individual pages are active or inactive; and
placing inactive individual units in a self-refresh mode includes placing banks having only inactive pages in a self-refresh mode, such that such banks self-refresh their contents.
11. An information handling system according to claim 8 , further comprising setting at least one variable indicating which individual units are to be placed in the self-refresh mode, and which individual units are to be placed in the command-based refresh mode.
12. An information handling system according to claim 11 , wherein the at least one variable is stored in a table such that an entry of the table is associated with an individual unit and indicates whether such individual unit of the memory system is to be placed in self-refresh mode or command-based refresh mode.
13. An information handling system according to claim 11 , wherein the at least one variable indicates a fraction of the individual units to be placed in self-refresh mode.
14. An information handling system according to claim 13 , wherein the at least one variable is stored as a field in a mode register of the memory system.
15. A memory system, comprising:
a processor;
a memory including individual units for storage of data; and
a memory controller communicatively coupled to the individual units and configured to:
track whether the individual units are active or inactive, wherein an inactive individual unit is an individual unit that is in use, but not currently being accessed;
place a first region including only inactive individual units in a self-refresh mode, such that the individual units of the first region self-refresh their contents;
filter memory controller commands generated upstream of the memory controller, the filtering including:
determining that a first memory controller command is directed to a first inactive individual unit of the memory system that is in a refresh interval, and in response, delaying the first memory controller command to the inactive individual unit of the memory system to prevent an internal self-refresh conflict with the first memory controller command;
determining that a second memory controller command is directed to a second inactive individual unit of the memory system that is not in a refresh interval, and in response, determining that the second memory controller command is an explicit refresh command;
in response to determining that the second memory controller command is the explicit refresh command, blocking the explicit refresh command to the second inactive individual unit of the memory system placed in the self-refresh mode; and
place a second region including active individual units in a command-based refresh mode, such that the individual units of the second region are refreshed in response to a received command to refresh their contents.
16. A memory system according to claim 15 , wherein an individual unit of the memory system comprises one of a block, a page, a bank, and a rank.
17. A memory system according to claim 15 , wherein:
each individual unit comprises a page;
tracking whether individual units are active or inactive includes tracking whether individual pages are active or inactive; and
placing inactive individual units in a self-refresh mode includes placing banks having only inactive pages in a self-refresh mode, such that such banks self-refresh their contents.
18. A memory system according to claim 15 , further comprising setting at least one variable indicating which individual units are to be placed in the self-refresh mode, and which individual units are to be placed in the command-based refresh mode.
19. A memory system according to claim 18 , wherein the at least one variable is stored in a table such that an entry of the table is associated with an individual unit and indicates whether such individual unit of the memory system is to be placed in self-refresh mode or command-based refresh mode.
20. A memory system according to claim 18 , wherein the at least one variable indicates a fraction of the individual units to be placed in self-refresh mode.
21. A memory system according to claim 20 , wherein the at least one variable is stored as a field in a mode register of the system.