Active differential resistors with reduced noise

1. An active differential resistor, comprising:

an input node and an output node operative to provide a differential resistance;

a diode having a first node and a second node;

a capacitor coupled in series between the first node of the diode and the input node; and

a current source coupled across the first node and the second node of the diode and configured to forward bias the diode such that a Johnson-Nyquist noise of the active differential resistor is replaced by a shot noise.

2. The active differential resistor of claim 1 , wherein the first node of the diode is a cathode and the second node of the diode is an anode.

3. The active differential resistor of claim 1 , wherein the first node of the diode is an anode and the second node of the diode is a cathode.

4. The active differential resistor of claim 1 , wherein the current source comprises a voltage source in series with a resistor.

5. The active differential resistor of claim 1 , wherein the capacitor is configured to decouple the active differential resistor from a circuit coupled between the input node and the output node, such that the active differential resistor can operate in a voltage environment that is independent of the circuit coupled thereto.

6. The active differential resistor of claim 1 , wherein a capacitance of the capacitor is based on a lowest desired frequency of operation of the active differential resistor for a predetermined resistance between the input node and the output node.

7. The active differential resistor of claim 1 , wherein:

the diode comprises a junction gate field-effect transistor (JFET), and

a drain and a source of the JFET are connected together.

8. The active differential resistor of claim 1 , wherein:

the diode comprises a p-channel JFET;

a gate of the p-channel JFET is operative as a cathode of the diode; and

at least one of: (i) a drain and (ii) a source of the p-channel JFET, are operative as an anode of the diode.

9. The active differential resistor of claim 1 , wherein:

the diode comprises an n-channel JFET;

a gate of the n-channel JFET is operative as an anode of the diode; and

at least one of: (i) a drain and (ii) a source of the p-channel JFET, are operative as a cathode of the diode.

10. The active differential resistor of claim 1 , wherein:

the diode comprises a monolithic insulated gate field effect transistor (MOSFET); and

a drain, a source, and a gate of the MOSFET are connected together.

11. The active differential resistor of claim 1 , wherein:

the diode comprises a vertical field effect transistor (VDMOS); and

a gate and a source of the VDMOS are connected together.

12. The active differential resistor of claim 1 , wherein the differential resistance of the active differential resistor is based on a current of the current source.

13. The active differential resistor of claim 1 , wherein a capacitance of the capacitor is based on a lowest desired frequency of operation of the active differential resistor for a predetermined resistance between the input node and the output node.

14. A method of providing an active differential resistance between an input node and an output node, comprising:

forward biasing a diode coupled between the input node and the output node such that a Johnson-Nyquist noise of the active differential resistance is replaced by a shot noise; and

coupling a capacitor between the input node and a first node of the diode.

15. The method of claim 14 , wherein the diode comprises a junction gate field-effect transistor (JFET); and

further comprising connecting a drain to a source of the JFET.

16. The method of claim 15 , wherein the JFET is a p-channel JFET; and further comprising:

operating a gate of the p-channel JFET as a cathode of the diode; and

operating at least one of: (i) a drain and (ii) a source of the p-channel JFET, as an anode of the diode.

17. The method of claim 15 , wherein the JFET is an n-channel JFET; and further comprising:

operating a gate of the n-channel JFET as an anode of the diode; and

operating at least one of: (i) a drain and (ii) a source of the p-channel JFET, as a cathode of the diode.

18. The method of claim 14 , wherein the diode comprises a monolithic insulated gate field effect transistor (MOSFET); and further comprising

connecting together a drain, a source, and a gate of the MOSFET.

19. The method of claim 14 , wherein the diode comprises a vertical field effect transistor (VDMOS); and further comprising connecting a gate to a source of the VDMOS.

20. The method of claim 14 , further comprising programming the differential resistance of the active differential resistor based on a current of a current source providing the forward biasing.

21. The method of claim 14 , wherein the current source comprises a voltage source in series with a resistor.

22. The method of claim 14 , further comprising decoupling, by the capacitor, the active differential resistance from a circuit connected between the input node and the output node, such that the active differential resistor can operate in a voltage environment that is independent of the circuit coupled thereto.

23. An active differential resistor, comprising:

an input node and an output node operative to provide a differential resistance;

a means of providing a unidirectional current having a first node and a second node;

a capacitor coupled in series between the first node of the means of providing the unidirectional current and the input node; and

a second means of providing a current coupled across the first node and the second node of the means of providing the unidirectional current, and configured to forward bias the means of providing the unidirectional current, such that a Johnson-Nyquist noise of the active differential resistor is replaced by a shot noise.