IP Library Granted Patent US 10,061,695
Granted Patent B2
US 10,061,695 · App. 15/237,391 · Granted Aug 28, 2018

Memory system and operating method thereof

Inventors: Beom Ju Shin (Gyeonggi-do, KR); Dae Hong Kim (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
G06F12/0246G06F12/0292G06F12/10G06F12/1009G06F2212/7201
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,061,695
App. No.
15/237,391
Granted
Aug 28, 2018
Kind
B2
Abstract

Provided herein are a memory system and an operating method thereof. A method of operating a controller for controlling a memory block including a plurality of pages includes determining whether the memory block is in an open state or a closed state, if the memory block is in the open state, reading merged metadata included in the plurality of pages, and rebuilding logical to physical (L2P) mapping data of a plurality of logical pages included in each of the plurality of pages based on the merged metadata.

Claims (55)

1. A method of operating a controller for controlling a memory block including a plurality of pages, the method comprising:

determining whether the memory block is in an open state or a closed state;

if the memory block is in the open state, reading merged metadata included in the plurality of pages; and

rebuilding logical to physical (L2P) mapping data of a plurality of logical pages included in each of the plurality of pages based on the merged metadata,

wherein each of the plurality of logical pages includes a userdata area and a metadata area,

wherein the merged metadata is stored in metadata areas of the plurality of logical pages, and

wherein the merged metadata represents metadata corresponding to the plurality of logical pages.

2. The method of claim 1 , further comprising, if the memory block is in the closed state, reading at least one meta page included in the memory block,

wherein the at least one meta page includes the merged metadata of the plurality of pages.

3. The method of claim 1 , wherein the reading of the merged metadata comprises:

reading merged metadata stored in a metadata area of an arbitrary logical page among the plurality of logical pages included in each of the plurality of pages; and

if a read operation of the merged metadata fails, reading merged metadata stored in a metadata area of at least one logical page except the arbitrary logical page in which the read operation has failed among the plurality of logical pages.

4. The method of claim 1 , wherein the reading of the merged metadata comprises reading merged metadata stored in a metadata area of a last stored logical page among the plurality of logical pages included in each of the plurality of pages.

5. The method of claim 1 , wherein the reading of the merged metadata comprises:

determining whether group metadata exists; and

if the group metadata exists, reading a group meta page that stores the group metadata therein,

wherein the group metadata includes the merged metadata.

6. The method of claim 5 , further comprising;

if the group metadata does not exist, reading merged metadata stored in a metadata area of an arbitrary logical page among the plurality of logical pages included in each of the plurality of pages; and

if a read operation of the merged metadata fails, reading merged metadata stored in a metadata area of at least one logical page except the arbitrary logical page in which the read operation has failed among the plurality of logical pages.

7. The method of claim 5 , further comprising, if the group metadata does not exist, reading merged metadata stored in a metadata area of a last stored logical page among the plurality of logical pages included in each of the plurality of pages included in the memory block.

8. The method of claim 1 , wherein the merged metadata includes L2P mapping data related to logical and physical block addresses of the plurality of logical pages included in each of the plurality of pages.

9. The method of claim 1 , wherein the plurality of logical pages included in each of the plurality of pages includes logical pages that respectively store least significant bit (LSB) page data, center significant bit (CSB) page data, and most significant bit (MSB) page data therein.

10. A controller for controlling a memory block including a plurality of pages, the controller comprising:

a processor configured to determine whether the memory block is in an open state or a closed state, and, if the memory block is in the open state, reading merged metadata included in the plurality of pages; and

a memory controller configured to rebuild logical to physical (L2P) mapping data of a plurality of logical pages included in each of the plurality of pages based on the merged metadata,

wherein each of the plurality of logical pages includes a userdata area and a metadata area,

wherein the merged metadata is stored in metadata areas of the plurality of logical pages, and

wherein the merged metadata represents metadata corresponding to the plurality of logical pages.

11. The controller of claim 10 , wherein, if the memory block is in the closed state, the processor reads at least one meta page included in the memory block, and

the at the least one meta page includes the merged metadata of the plurality of pages.

12. The controller of claim 10 ,

wherein the processor reads merged metadata stored in a metadata area of an arbitrary logical page among the plurality of logical pages included in each of the plurality of pages included in the memory block, and, if a read operation of the merged metadata fails, reads merged metadata stored in a metadata area of at least one logical page except the arbitrary logical page in which the read operation has failed among the plurality of logical pages.

13. The controller of claim 10 ,

wherein the processor reads merged metadata stored in a metadata area of a last stored logical page among the plurality of logical pages included in each of the plurality of pages.

14. The controller of claim 10 ,

wherein the processor determines whether group metadata obtained by adding metadata of some pages among the plurality of pages exists, and, if the group metadata exists, reads a group meta page that stores the group metadata therein, and

the group metadata includes merged metadata.

15. The controller of claim 14 ,

wherein, if the group metadata does not exist, the processor reads merged metadata stored in a metadata area of an arbitrary logical page among the plurality of logical pages included in each of the plurality of pages, and, if a read operation of the merged metadata fails, reads merged metadata stored in a metadata area of at least one logical page except the arbitrary logical page in which the read operation has failed among the plurality of logical pages.

16. The controller of claim 14 ,

wherein, if the group metadata does not exist, the processor reads merged metadata stored in a metadata area of a last stored logical page among the plurality of logical pages included in each of the plurality of pages.

17. The controller of claim 10 ,

wherein the merged metadata includes L2P mapping data related to logical and physical block addresses of the plurality of logical pages included in each of the plurality of pages.

18. The controller of claim 10 ,

wherein the plurality of logical pages included in each of the plurality of pages include logical pages that respectively store least significant bit (LSB) page data, center significant bit (CSB) page data, and most significant bit (MSB) page data therein.

19. A memory system comprising:

a memory device including a memory block including a plurality of pages, configured to store merged metadata by adding metadata of a plurality of logical page data to be stored in a selected page among the plurality of pages in metadata areas of a plurality of logical pages included in the selected page; and

a controller configured to rebuild logical to physical (L2P) mapping data based on the merged metadata,

wherein the controller is further configured to read merged metadata stored in a metadata area of an arbitrary logical page among the plurality of logical pages included in selected page the, and

if a read operation of the merged metadata stored in the metadata area of the arbitrary logical page fails, to read merged metadata stored in a metadata area of at least one logical page except the arbitrary logical page in which the read operation has failed among the plurality of logical pages.

20. The memory system of claim 19 ,

wherein the controller is configured to determine whether the memory block is in an open state or a closed state;

if the memory block is in the open state, to read merged metadata included in the memory block; and

if the memory block is in the closed state, to read at least one meta page included in the memory block, the at the least one meta page including the merged metadata included in the memory block.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2016
From: SHIN, BEOM JU; KIM, DAE HONG
To: SK HYNIX INC.
Reel/Frame 039687/0591 →
Priority Claims (1)
KR 10-2016-0032048 · Mar 17, 2016 · national
Continuity (1)
Related Publication 20170270040A1 · Sep 21, 2017