Radio receiver and method for processing an uplink transport block

1. A radio receiver, comprising:

a receiving stage configured to receive one of an enhanced physical downlink control channel (EPDCCH) and a physical downlink control channel (PDCCH), the one of the EPDCCH and PDCCH comprising an uplink grant;

a decoding stage comprising a physical layer (PHY) device, the PHY device configured to decode the one of the EPDCCH and PDCCH and to derive a time budget from a decoded uplink grant, the decoding stage is configured to derive a reduced time budget for processing the uplink transport block from the time budget, the reduced time budget being smaller when the one of the EPDCCH and PDCCH is the EPDCCH compared with when the one of the EPDCCH and PDCCH is the PDCCH;

a processing stage comprising a media access control layer (MAC) device, the MAC device configured to determine an amount of payload potentially generated for an uplink transport block based on the time budget, the PHY device configured to indicate the reduced time budget to the MAC device, the MAC device configured to process the uplink transport block based on the reduced time budget, and the processing stage to generate a payload section of the uplink transport block based on the determined amount of payload; and

an encoding stage configured to generate a padding section of the uplink transport block and to encode the uplink transport block comprising the payload section and the padding section.

2. The radio receiver of claim 1 ,

wherein the time budget indicates a time available for processing an uplink transport block.

3. The radio receiver of claim 1 ,

wherein the processing stage is configured to determine a size of the padding section and to indicate the determined size of the padding section to the encoding stage.

4. The radio receiver of claim 1 ,

wherein the processing stage is configured to provide address information of the payload section to the encoding stage.

5. The radio receiver of claim 1 ,

wherein the processing stage is configured to provide the payload section and information on a start of the padding section to the encoding stage.

6. The radio receiver of claim 1 ,

wherein the encoding stage is configured to generate the padding section during encoding at least a part of the uplink transport block.

7. The radio receiver of claim 1 ,

wherein the decoding stage is configured to derive the reduced time budget for processing the uplink transport block from the time budget based on a timing advance value received in a downlink direction.

8. The radio receiver of claim 7 ,

wherein the timing advance value is based on a distance between the radio receiver and a base station providing the timing advance value.

9. The radio receiver of claim 7 ,

wherein the timing advance value is independent of a length of the one of the EPDCCH and PDCCH.

10. The radio receiver of claim 1 , wherein:

the receiving stage is further configured to receive a timing advance value that is based on a distance between the radio receiver and a base station providing the timing advance value,

wherein the decoding stage is configured to derive the reduced time budget based on the timing advance value and, when the one of the EPDCCH and PDCCH is the EPDCCH, a lateness of the EPDCCH.

11. A radio receiver circuit, comprising:

a downlink physical layer (DL PHY) circuit configured to decode a downlink control channel comprising an uplink grant and to derive a time budget from a decoded uplink grant and a reduced time budget for provisioning of an uplink transport block based on a time for processing the downlink control channel and the uplink transport block by an uplink physical layer (UL) PHY circuit;

a media access control (MAC) circuit configured to determine an amount of payload potentially generated for an uplink transport block based on the time budget and to generate a payload section of the uplink transport block based on the determined amount of payload, the DL PHY circuit configured to indicate the reduced time budget to the MAC circuit, the MAC circuit configured to process the uplink transport block based on the reduced time budget; and

the UL PHY circuit configured to generate a padding section of the uplink transport block and to encode the uplink transport block comprising the payload section and the padding section.

12. The radio receiver circuit of claim 11 ,

wherein the MAC circuit is configured to determine a size of the padding section and to indicate the determined size of the padding section to the UL PHY circuit.

13. The radio receiver circuit of claim 11 ,

wherein the MAC circuit is configured to provide address information of the payload section of the uplink transport block to the UL PHY circuit.

14. The radio receiver circuit of claim 11 ,

wherein the MAC circuit is configured to provide the payload section and information on a start of the padding section to the UL PHY circuit.

15. The radio receiver circuit of claim 11 ,

wherein the UL PHY circuit is configured to generate the padding section during encoding at least a part of the uplink transport block.

16. The radio receiver circuit of claim 11 ,

wherein the DL PHY circuit is configured to derive a reduced time budget for processing the uplink transport block from the time budget based on a timing advance value received in a downlink direction.

17. A radio receiver system, comprising:

a physical layer (PHY) device; and

a media access control (MAC) device,

wherein the PHY device is configured to decode an uplink grant information from a downlink control channel and to derive a time budget from the uplink grant information,

wherein the MAC device is configured to generate a payload section of an uplink transport block based on the time budget,

wherein the PHY device is configured to generate a padding section of the uplink transport block and to encode the uplink transport block,

wherein the PHY device is configured to determine a reduced time budget for provisioning of the uplink transport block based on a timing advance value received in a downlink direction and a time for processing: the downlink control channel and the uplink transport block by the PHY device,

wherein the PHY device is configured to indicate the reduced time budget to the MAC device; and

wherein the MAC device is configured to process the uplink transport block based on the reduced time budget.

18. The radio receiver system of claim 17 ,

wherein the PHY device is configured to determine the time for processing the downlink control channel and the uplink transport block based on clock settings of the PHY device and clock settings of the MAC device.

19. The radio receiver system of claim 17 ,

wherein the PHY device is configured to encode the uplink transport block during generating at least a part of the padding section.

20. A method for processing a downlink transport block by a physical layer (PHY) and a media access control (MAC) layer, the method comprising:

decoding a downlink control channel comprising an uplink grant and deriving a time budget from a decoded uplink grant by the PHY layer;

generating a payload section of an uplink transport block by the MAC layer based on the time budget;

generating a padding section of the uplink transport block and encoding the uplink transport block by the PHY layer;

determining a reduced time budget by the PHY layer based on a reduction of the time budget by a timing advance value;

indicating the reduced time budget by the PHY layer to the MAC layer; and

processing the uplink transport block by the MAC layer based on the reduced time budget.

21. The method of claim 20 , further comprising:

determining the reduced time budget and the uplink transport block based on clock settings of the PHY layer and clock settings of the MAC layer.