IP Library Granted Patent US 9,842,854
Granted Patent B2
US 9,842,854 · App. 15/241,210 · Granted Dec 12, 2017

Manufacturing method of a semiconductor device and semiconductor device

Inventor: Shingo Honda (Yokkaichi, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11582H01L21/76816H01L21/76897H01L23/528H01L23/5226H01L27/1157
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Quick Facts
Patent No.
US 9,842,854
App. No.
15/241,210
Granted
Dec 12, 2017
Kind
B2
Abstract

According to one embodiment, a first stacked body in which first insulation layers and second insulation layers are alternately stacked is formed, a first hole penetrating through the first stacked body is formed, a sacrifice film is embedded in the first hole, the sacrifice film is protruded from the first stacked body to form a protrusion portion on the first stacked body, a second stacked body in which third insulation layers and fourth insulation layers are alternately stacked is formed on the first stacked body, and a second hole penetrating through the second stacked body is formed.

Claims (39)

1. A manufacturing method of a semiconductor device, comprising:

forming a first stacked body in which first insulation layers and second insulation layers are alternately stacked;

forming an intermediate layer on the first stacked body;

forming a first hole penetrating through the first stacked body and the intermediate layer;

embedding a sacrifice film in the first hole;

removing the sacrifice film positioned on the intermediate layer;

forming a protrusion portion protruding from the intermediate layer at the position where the sacrifice film is removed;

forming, on the intermediate layer, a second stacked body in which third insulation layers and fourth insulation layers are alternately stacked to cover the protrusion portion;

forming a second hole penetrating through the second stacked body, the intermediate layer, and the protrusion portion; and

removing the sacrifice film from the first hole, wherein

first steps are provided on lower surfaces of the fourth insulation layers in correspondence with the protrusion portion,

second steps are provided on upper surfaces of the fourth insulation layers in correspondence with the protrusion portion, and

the fourth insulation layers are provided with film thickness differences at positions of the first steps and the second steps.

2. The manufacturing method of the semiconductor device of claim 1 , wherein a central position of a top surface of the second hole is misaligned with a central position of a bottom surface of the second hole.

3. A manufacturing method of a semiconductor device, comprising:

forming a first stacked body in which first insulation layers and second insulation layers are alternately stacked;

forming an intermediate layer on the first stacked body;

forming a first hole penetrating through the first stacked body and the intermediate layer;

embedding a sacrifice film in the first hole;

removing the sacrifice film positioned on the intermediate layer;

forming a protrusion portion protruding from the intermediate layer at the position where the sacrifice film is removed;

forming, on the intermediate layer, a second stacked body in which third insulation layers and fourth insulation layers are alternately stacked to cover the protrusion portion;

forming a second hole penetrating through the second stacked body, the intermediate layer, and the protrusion portion; and

removing the sacrifice film from the first hole, wherein

forming the protrusion portion includes;

embedding an embedding material at the position where the sacrifice film is removed; and

thinning the intermediate layer to protrude the embedding material.

4. A manufacturing method of a semiconductor device, comprising:

forming a first stacked body in which first insulation layers and second insulation layers are alternately stacked;

forming an intermediate layer on the first stacked body;

forming a first hole penetrating through the first stacked body and the intermediate layer;

embedding a sacrifice film in the first hole;

removing the sacrifice film positioned on the intermediate layer;

forming a protrusion portion protruding from the intermediate layer at the position where the sacrifice film is removed;

forming, on the intermediate layer, a second stacked body in which third insulation layers and fourth insulation layers are alternately stacked to cover the protrusion portion;

forming a second hole penetrating through the second stacked body, the intermediate layer, and the protrusion portion; and

removing the sacrifice film from the first hole, wherein

the intermediate layer includes a first oxide film and a second oxide film, and

the first oxide film is a tetraethyl orthosilicate (TEOS) film formed by low pressure chemical vapor deposition (LPCVD), and the second oxide film is a TEOS film formed by plasma CVD.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043088/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2016
From: HONDA, SHINGO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 039481/0224 →
Continuity (2)
Provisional Application 62335243 · May 12, 2016
Related Publication 20170330892A1 · Nov 16, 2017