IP Library Granted Patent US 9,935,550
Granted Patent B2
US 9,935,550 · App. 15/247,290 · Granted Apr 3, 2018

System and method for preventing cross-conduction when switching circuitry during voltage regulation

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Quick Facts
Patent No.
US 9,935,550
App. No.
15/247,290
Granted
Apr 3, 2018
Kind
B2
Abstract

To prevent cross-conduction when switching switches in switching circuitry for voltage regulation, a dead time may be maintained between turning off a switch and turning on a switch. The dead time may be determined based on a switching transition voltage and a voltage of the switching circuitry and may be implemented using a timer.

Claims (31)

1. A voltage regulator comprising:

switching circuitry including a first switching transistor and a second switching transistor, the first switching transistor and the second switching transistor electrically connected in series, a point of electrical connection between the first switching transistor and the second switching transistor providing a phase node of the switching circuitry; and

switching logic configured to:

when the first switching transistor is in an on state and the second switching transistor is in an off state, monitor a switching transition voltage of the first switching transistor;

when the switching transition voltage passes a switching transition voltage threshold for the switching transition voltage of the first switching transistor, monitor a phase node voltage of the phase node, wherein the phase node voltage corresponds to a body diode voltage of the first switching transistor; and

when the phase node voltage passes a phase node voltage threshold for the phase node voltage, turn on the second switching transistor after a dead time determined based on a temporal duration between the switching transition voltage passing the switching transition voltage threshold and the phase node voltage passing the phase node voltage threshold.

2. The voltage regulator of claim 1 , wherein the switching transition voltage is a gate voltage of the first switching transistor.

3. The voltage regulator of claim 1 , wherein the first switching transistor is a high side transistor.

4. The voltage regulator of claim 1 , wherein the first switching transistor is a low side transistor.

5. The voltage regulator of claim 1 , wherein the switching logic is configured to receive a switching control signal and cause the first switching transistor and the second switching transistor to transition states based upon the switching control signal.

6. The voltage regulator of claim 1 , further comprising a timer, wherein the timer is incremented over the temporal duration to determine the dead time.

7. The voltage regulator of claim 6 , wherein the timer is decremented subsequent to the phase node voltage passing the phase node voltage threshold to determine the dead time.

8. The voltage regulator of claim 6 , further comprising a comparator, wherein the comparator is configured to compare the phase node voltage with the phase voltage threshold to determine when the phase node voltage passes the phase node voltage threshold.

9. The voltage regulator of claim 1 , wherein if the phase node voltage fails to pass the phase node voltage threshold, a default dead time is set.

10. A method of switching during voltage regulation, the method comprising:

receiving a switching signal when a first switching transistor is in an on state and a second switching transistor is in an off state;

determining when a first gate voltage of a first gate of the first switching transistor passes a gate voltage threshold for the first gate voltage;

when the first gate voltage passes the gate voltage threshold, monitor a phase node voltage defined by switching the first switching transistor and the second switching transistor, wherein the phase node voltage corresponds to a body diode voltage of the first switching transistor; and

when the phase node voltage passes a phase node voltage threshold for the phase node voltage, turn on the second switching transistor after a dead time determined based on a temporal duration between the first gate voltage passing the gate voltage threshold and the phase node voltage passing the phase node voltage threshold.

11. The method of claim 10 , wherein the first switching transistor is a high side transistor.

12. The method of claim 10 , wherein the first switching transistor is a low side transistor.

13. The method of claim 10 , wherein the phase node voltage threshold is based on a body diode voltage of the first switching transistor.

14. A voltage regulator comprising:

switching circuitry including a first switching transistor and a second switching transistor, the first switching transistor and the second switching transistor electrically connected in series, a point of electrical connection between the first switching transistor and the second switching transistor providing a phase node of the switching circuitry; and

switching logic configured to:

when the first switching transistor is in an on state and the second switching transistor is in an off state, monitor a first gate voltage of a first gate of the first switching transistor;

when the first gate voltage passes a gate voltage threshold, monitor the phase node voltage and integrate values of the phase voltage over time to derive an integration sum; and

when the integration sum exceeds an integration threshold, turn on the second switching transistor after a dead time determined based on a temporal duration between the first gate voltage passing the gate voltage threshold and the integration sum exceeding the integration threshold.

15. The voltage regulator of claim 14 , further comprising an integrator, wherein the integrator is configured to integrate values of the phase node voltage over time to derive the integration sum.

16. The voltage regulator of claim 14 , wherein the first switching transistor is a high side transistor.

17. The voltage regulator of claim 14 , wherein the first switching transistor is a low side transistor.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040679/0386) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0666 →
RELEASE OF SECURITY INTEREST AT REEL 040633 FRAME 0799 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
Reel/Frame 058297/0427 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Nov 23, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 040679/0386 →
SECURITY INTEREST Recorded Nov 16, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040633/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2016
From: ZHU, GUANGYONG; LUO, SHIGUO; ZHANG, KEJIU; WANG, LEI
To: DELL PRODUCTS, LP
Reel/Frame 039679/0454 →