IP Library Granted Patent US 10,237,898
Granted Patent B2
US 10,237,898 · App. 15/252,707 · Granted Mar 19, 2019

Arrangement for concurrent detection of signals in a receiver

Inventors: Prasanna Desai (Elfin Forest, CA); Anthony Tsangaropoulos (San Carlos, CA)
Assignee: Intel IP Corporation
H04W76/10H04B1/0067H04L5/0048H04L41/12H04W4/80
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Quick Facts
Patent No.
US 10,237,898
App. No.
15/252,707
Granted
Mar 19, 2019
Kind
B2
Abstract

An arrangement for detection of multiple signals concurrently is disclosed. The arrangement includes a demodulator component, a mixer and a detector. The demodulator component is configured to demodulate or obtain one or more components from a received signal. The mixer is configured to mix the one or more components into a folded signal using a plurality of varied local oscillator (LO) signals. The detector is configured to identify a valid signal within the folded signal and to initiate a response for the identified valid signal.

Claims (35)

1. An arrangement for concurrent scanning of a plurality of channels, the arrangement comprising:

a generator configured to generate one or more components from a received signal, wherein the received signal comprises the plurality of channels;

a mixer configured to mix the one or more components into a folded signal based on a plurality of local oscillator (LO) signals; and

a detector configured to concurrently scan the plurality of channels to detect a signal within the folded signal based on a predetermined set of criteria and to initiate a response based on the detected signal.

2. The arrangement of claim 1 , further comprising a LO signal generator configured to generate the plurality of LO signals based on the plurality of channels.

3. The arrangement of claim 2 , wherein the plurality of channels include Bluetooth low energy (BLE) and Zigbee (ZB).

4. The arrangement of claim 1 , wherein the mixer includes four pairs of mixers, each pair configured to utilize one of the plurality of LO signals.

5. The arrangement of claim 1 , wherein the arrangement includes a low noise amplifier configured to amplifier the received signal and provide the received signal to the generator component.

6. The arrangement of claim 1 , wherein the generator is a quadrature generator.

7. The arrangement of claim 1 , wherein the mixer is configured to generate a plurality of mixed signals using the plurality of LO signals to downconvert the one or more components.

8. The arrangement of claim 7 , wherein the mixer includes a summation component configured to fold the plurality of mixed signals into the folded signal.

9. The arrangement of claim 1 , wherein the plurality of LO signals are combined into a single, multi-frequency LO signal.

10. The arrangement of claim 1 , wherein the detector includes an address correlator configured to identify a valid signal and associated address from the folded signal, wherein the valid signal is the detected signal.

11. The arrangement of claim 1 , wherein the detector includes a preamble detector configured to identify a valid signal based on a detected preamble of the folded signal, wherein the valid signal is the detected signal.

12. An apparatus comprising:

an oscillator configured to generate a primary oscillator signal based on a predetermined frequency of a plurality of channels and to generate a plurality of local oscillator (LO) signals from the primary oscillator signal based on the plurality of channels, wherein the predetermined frequency is a multiple of a highest frequency of the plurality of channels;

a mixer configured to generate a plurality of mixed signals based on signal components from a received signal and the plurality of LO signals and to combine the mixed signals into a combined signal;

a channel select filter configured to filter the combined signal based on the plurality of channels and provide a filtered output signal, wherein the filtered output signal comprises signals from the plurality of channels; and

a detector configured to concurrently scan the plurality of channels to detect a presence of a signal within the filtered output signal of the plurality of channels.

13. The apparatus of claim 12 , wherein the signal components include an in phase component.

14. The apparatus of claim 12 , further comprising a multi-frequency mixer configured to combine the plurality of LO signals into a single multi-frequency LO signal.

15. The apparatus of claim 14 , wherein the mixer utilizes the single multi-frequency LO signal.

16. A method of concurrently scanning a plurality of channels, the method comprising:

receiving a signal using a plurality of channels;

generating quadrature and in phase components from the received signal;

mixing the quadrature component with one or more local oscillator signals to generate one or more mixed quadrature signals;

mixing the in phase component with the one or more local oscillator signals to generate one or more mixed in phase signals;

combining the one or more mixed quadrature signals into a folded quadrature signal;

combining the one or more mixed in phase signals into a folded in phase signal;

combining the folded quadrature signal and the folded in phase signal into a folded signal; and

detecting a signal within the folded signal based on a predetermined set of criteria.

17. The method of claim 16 , further comprising detecting a valid signal within the folded signal, wherein the valid signal is the detected signal.

18. The method of claim 17 , further comprising generating an event in response to detecting the valid signal.

19. The method of claim 16 , wherein the one or more LO signals is a single multi-frequency LO signal.

20. The arrangement of claim 1 , wherein the criteria is channel strength.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053307/0500 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053051/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2016
From: DESAI, PRASANNA; TSANGAROPOULOS, ANTHONY
To: INTEL IP CORPORATION
Reel/Frame 039778/0228 →
Continuity (1)
Related Publication 20180063873A1 · Mar 1, 2018