IP Library Granted Patent US 10,101,939
Granted Patent B2
US 10,101,939 · App. 15/253,728 · Granted Oct 16, 2018

Storage system having a host that manages physical data locations of a storage device

Inventor: Daisuke Hashimoto (Cupertino, CA)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/064G06F1/266G06F3/0604G06F3/067G06F3/0659G06F3/0665G06F3/0688G06F11/1068G06F12/0246G11C5/147G11C29/52G06F2212/152G06F2212/214G06F2212/261G06F2212/263G06F2212/7201
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Quick Facts
Patent No.
US 10,101,939
App. No.
15/253,728
Granted
Oct 16, 2018
Kind
B2
Abstract

A storage system includes a storage device including a controller and a nonvolatile memory unit, and a host including a processor configured to determine whether or not the host is going to access the storage device within a predetermined range of time, and cause the storage device to be powered off when it is determined that the host is not going to access the storage device within the predetermined range of time.

Claims (20)

1. A storage system comprising:

a host; and

a storage device connected to the host, the storage device including a nonvolatile semiconductor memory having a plurality of physical blocks, a physical block being a unit of data erasure, and a controller configured to maintain block mapping indicating block categorization of the physical blocks, including active blocks that store valid data and free blocks that store no valid data, and send a notification to the host upon determining that a difference between a largest number of data erasure times among the free blocks and a smallest number of data erasure times among the active blocks is greater than a threshold, wherein

the host includes a processor configured to cause the controller to carry out moving of data stored in an active block of the nonvolatile semiconductor memory to the free block that has undergone data erasure the largest number of times among the free blocks, upon reception of the notification.

2. The storage system according to claim 1 , wherein

the active block from which the data are moved is an active block that has undergone data erasure a smallest number of times among the active blocks.

3. The storage system according to claim 1 , wherein

the processor is further configured to cause the controller to remap the active block from which the data were moved as a free block in the block mapping.

4. The storage system according to claim 1 , wherein

the processor is further configured to maintain an address mapping from an identification or a logical address of data to a physical location of the nonvolatile semiconductor memory in which the data are stored, with respect to each of data stored in the nonvolatile semiconductor memory, and update the address mapping for the data stored in the active block of the nonvolatile semiconductor memory that have been moved to the free block.

5. A storage system comprising:

a host; and

a storage device connected to the host, the storage device including a nonvolatile semiconductor memory having a plurality of physical blocks, a physical block being a unit of data erasure, and a controller configured to maintain block mapping indicating block categorization of the physical blocks, including active blocks that store valid data and free blocks that store no valid data, and send the block remapping to the host in response to a request for the block remapping received from the host, wherein

the host includes a processor configured to issue the request for the block remapping to the controller, and cause the controller to carry out moving of data stored in an active block of the nonvolatile semiconductor memory to the free block that has undergone data erasure a largest number of times among the free blocks, upon determining by the processor, based on the block remapping, that a difference between the largest number of data erasure times among the free blocks and a smallest number of data erasure times among the active blocks is greater than a threshold.

6. The storage system according to claim 5 , wherein

the active block from which the data are moved is an active block that has undergone data erasure a smallest number of times among the active blocks.

7. The storage system according to claim 5 , wherein

the processor is further configured to cause the controller to remap the active block from which the data were moved as a free block in the block mapping.

8. The storage system according to claim 5 , wherein

the processor is further configured to maintain an address mapping from an identification or a logical address of data to a physical location of the nonvolatile semiconductor memory in which the data are stored, with respect to each of data stored in the nonvolatile semiconductor memory, and update the address mapping for the data stored in the active block of the nonvolatile semiconductor memory that have been moved to the free block.

Assignments (6)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2016
From: HASHIMOTO, DAISUKE
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 039960/0454 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2016
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 039960/0489 →
Continuity (2)
Provisional Application 62305890 · Mar 9, 2016
Related Publication 20170262178A1 · Sep 14, 2017