IP Library Granted Patent US 9,866,477
Granted Patent B2
US 9,866,477 · App. 15/254,111 · Granted Jan 9, 2018

System and method for high-performance, low-power data center interconnect fabric

Inventors: Mark Bradley Davis (Austin, TX); David James Borland (Austin, TX)
Assignee: III Holdings 2, LLC
H04L45/74G06F1/3234G06F3/0605G06F3/067G06F3/0631G06F9/5016G06F12/0284G06F13/00G06F13/24G06F13/40H04L45/00H04L45/60H04L45/7457H04L49/109H04L49/15H04L49/201H04L49/25H04L49/253H04L49/3009H04L49/351H04L49/356H04L47/10Y02B60/1228Y02B60/1235Y02B60/44
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Quick Facts
Patent No.
US 9,866,477
App. No.
15/254,111
Granted
Jan 9, 2018
Kind
B2
Abstract

A system and method are provided that support a routing using a tree-like or graph topology that supports multiple links per node, where each link is designated as an Up, Down, or Lateral link, or both, within the topology. The system may use a segmented MAC architecture which may have a method of re-purposing MAC IP addresses for inside MACs and outside MACs, and leveraging what would normally be the physical signaling for the MAC to feed into the switch.

Claims (27)

1. A switch system comprising:

a plurality of nodes, wherein each node of the plurality of nodes includes a switch;

a plurality of links associated with each node, wherein the plurality of links are configured to connect nodes in the plurality of nodes to create a topology of a switch fabric for routing data through the plurality of nodes;

a management processor in at least one of the nodes, wherein the management processor is configured to control the routing of data through the switch fabric; and

at least one routing header processor at each switch, wherein the at least one routing header processor is configured to access a content addressable memory with a tag to determine if an incoming broadcast packet has crossed through a particular switch.

2. The switch system of claim 1 , wherein the tag comprises a broadcast identifier.

3. The switch system of claim 1 , wherein the at least one routing header processor is further configured to standardize one or more fields in the incoming broadcast packet.

4. The switch system of claim 3 , wherein the one or more fields comprise a preamble field, a start of frame field, and an inter-frame gap field.

5. The switch system of claim 1 , wherein the at least one routing header processor is further configured to add one or more fields to the incoming broadcast packet such that the incoming broadcast packet can be received by the fabric switch.

6. The switch system of claim 5 , wherein the at least one routing header processor is further configured to strip the one or more fields from the incoming broadcast packet before the incoming broadcast packet leaves the fabric switch.

7. The switch system of claim 1 , wherein the at least one routing header processor is further configured to generate a routing frame header for a frame packet using a routing table.

8. The switch system of claim 7 , wherein the frame packet comprises the routing frame header and a core portion of an Ethernet frame.

9. The switch system of claim 7 , wherein the at least one routing header processor is further configured to convert the frame packet to an Ethernet packet.

10. The switch system of claim 9 , wherein the conversion is performed as the frame packet is entering or leaving the fabric switch.

11. A method comprising:

controlling, using a management processor in one of a plurality of nodes of a fabric switch, routing of data through the switch fabric;

generating, by at least one routing header processor in one of the plurality of nodes, a routing frame header for a frame packet using a routing table, wherein the routing frame header includes a domain identifier and a management domain state associated with a media access control (MAC) layer that generated the routing frame header; and

converting, by the at least one routing header processor, the frame packet to an Ethernet packet.

12. The method of claim 11 , wherein the frame packet comprises the routing frame header and a core portion of an Ethernet frame.

13. The method of claim 11 , wherein the conversion is performed as the frame packet is entering or leaving the fabric switch.

14. A method comprising:

controlling, using a management processor of a fabric switch that includes a plurality of nodes, routing of data through the switch fabric;

accessing, by at least one routing header processor in the fabric switch, a content addressable memory with a tag to determine if an incoming broadcast packet has crossed through a particular switch; and

standardizing, by the at least one routing header processor, one or more fields in the incoming broadcast packet.

15. The method of claim 14 , wherein the one or more fields comprises a preamble field, a start of frame field, and an inter-frame gap field.

16. The method of claim 14 , further comprising adding, by the at least one routing header processor, one or more fields to the incoming broadcast packet such that the incoming broadcast packet can be received by the fabric switch.

17. The method of claim 16 , further comprising stripping, by the at least one routing header processor, the one or more fields from the incoming broadcast packet before the incoming broadcast packet leaves the fabric switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2017
From: SILICON VALLEY BANK
To: III HOLDINGS 2, LLC
Reel/Frame 043759/0175 →
Continuity (4)
Continuation 14334931 · Jul 18, 2014
Continuation 12794996 · Jun 7, 2010
Provisional Application 61256723 · Oct 30, 2009
Related Publication 20160373354A1 · Dec 22, 2016