IP Library Granted Patent US 10,095,414
Granted Patent B2
US 10,095,414 · App. 15/267,734 · Granted Oct 9, 2018

Memory system including a controller and a nonvolatile memory having memory blocks

Inventors: Tatsuya Zettsu (Yokohama, JP); Yoshihisa Kojima (Kawasaki, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/061G06F3/0647G06F3/0679G06F12/0246G06F3/0653G06F3/0655
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Quick Facts
Patent No.
US 10,095,414
App. No.
15/267,734
Granted
Oct 9, 2018
Kind
B2
Abstract

A nonvolatile memory having memory blocks, and a controller configured to select a first block and a second block among the memory blocks, determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block, determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data in the first block on the basis of the third percentage, and write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

Claims (46)

1. A memory system comprising:

a nonvolatile memory having memory blocks; and

a controller configured to:

select a first block and a second block among the memory blocks;

determine a third percentage on the basis of a first percentage of valid data in the first block and a second percentage of valid data in the second block;

determine a first ratio between a write amount of user data in accordance with a request from a host and a write amount of the valid data in the first block on the basis of the third percentage; and

write the user data and the valid data in the first block into the nonvolatile memory on the basis of the first ratio.

2. The system of claim 1 , wherein

the controller selects the first block and the second block as a target of a garbage collection process.

3. The system of claim 2 , wherein

the controller selects candidate blocks meeting a given condition from the memory blocks, and selects the first block and the second block from the candidate blocks.

4. The system of claim 3 , wherein

the controller selects two blocks as the first block and the second block from the candidate blocks, the two blocks having two smallest percentages of the valid data.

5. The system of claim 1 , wherein

the controller selects the first block as a target of a garbage collection process, and selects the second block as a target of a refresh process.

6. The system of claim 5 , wherein

the controller selects candidate blocks meeting a given condition from the memory blocks, and selects the first block from the candidate blocks.

7. The system of claim 6 , wherein

the controller selects one block as the first block from the candidate blocks, the one block having a smallest percentage of the valid data.

8. The system of claim 1 , wherein

the controller determines the third percentage as an average of the first percentage and the second percentage.

9. The system of claim 1 , wherein

the controller determines the first percentage by multiplying a percentage of the valid data in the first block at a first time by (1−α) and the second percentage by multiplying a percentage of the valid data in the second block at the first time by (1−α), where α is a decaying factor of the valid data from the first time to a second time at which a write of the valid data in the first block is started.

10. The system of claim 1 , wherein

the controller determines a percentage of the valid data at a given time on the basis of an extrapolation obtained by a percentage of the valid data at a first time that is a time before the given time, and a percentage of the valid data at a second time that is a time before the given time and after the first time.

11. The system of claim 1 , wherein

the controller determines 1:N as the first ratio, where N=R/(1−R), N is a write amount of the valid data in the first block into the nonvolatile memory when a write amount of the user data into the nonvolatile memory is 1, and R is the third percentage.

12. The system of claim 11 , wherein

N is smaller than 1.

13. The system of claim 1 , wherein

the controller selects a third block from the memory blocks after writing the valid data in the first block, determines a fifth percentage on the basis of the second percentage and a fourth percentage of valid data in the third block, determines a second ratio between a write amount of user data into the nonvolatile memory and a write amount of the valid data in the second block into the nonvolatile memory on the basis of the fifth percentage, and writes the user data and the valid data in the second block on the basis of the second ratio.

14. The system of claim 13 , wherein

the controller determines the fifth percentage as an average of the second and fourth percentages.

15. The system of claim 13 , wherein

the controller determines the second percentage by multiplying a percentage of the valid data in the second block at a first time by (1−α) and the fourth percentage by multiplying a percentage of the valid data in the third block at the first time by (1−α), where α is a decaying factor of the valid data from the first time to a second time at which a write of the valid data in the second block is started.

16. The system of claim 13 , wherein

the controller determines a percentage of the valid data at a given time on the basis of an extrapolation obtained by a percentage of the valid data at a first time that is a time before the given time, and a percentage of the valid data at a second time that is a time before the given time and after the first time.

17. The system of claim 1 , wherein

the controller changes the first block to a free block having no valid data after writing the valid data into the first block.

18. The system of claim 1 , wherein

the first percentage is different from the second percentage.

19. The system of claim 1 , wherein

each of the memory blocks comprises a data unit having a given data amount, and

the controller selectively writes the user data or the valid data in the first block into the nonvolatile memory for data unit.

20. The system of claim 1 , wherein

the controller determines an order of write operations of the user data and write operations of the valid data in the first block on the basis of the first ratio.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043620/0798 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2017
From: ZETTSU, TATSUYA; KOJIMA, YOSHIHISA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 042412/0462 →
Continuity (2)
Provisional Application 62304485 · Mar 7, 2016
Related Publication 20170255405A1 · Sep 7, 2017