IP Library Granted Patent US 10,026,779
Granted Patent B2
US 10,026,779 · App. 15/268,520 · Granted Jul 17, 2018

Magnetoresistive memory device and manufacturing method of the same

Inventor: Tomoya Sanuki (Yokohama Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/228H01L43/02H01L43/12
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Quick Facts
Patent No.
US 10,026,779
App. No.
15/268,520
Granted
Jul 17, 2018
Kind
B2
Abstract

According to one embodiment, a magnetoresistive memory device, includes first wirings arranged parallel to each other in or on a substrate, second wirings arranged parallel to each other above the substrate to cross the first wirings when viewed in a direction perpendicular to a surface of the substrate, and magnetoresistive elements provided corresponding to intersections of the first and second wirings, respectively, and divided into layers.

Claims (48)

1. A magnetoresistive memory device, comprising:

first wirings arranged parallel to each other in or on a substrate;

second wirings arranged parallel to each other above the substrate to cross the first wirings when viewed in a direction perpendicular to a surface of the substrate;

select transistors provided in a surface portion of the substrate and using the first wirings as gate electrodes; and

magnetoresistive elements provided corresponding to intersections of the first and second wirings, respectively,

wherein the magnetoresistive elements are provided between part of the select transistors and the second wirings, and

wherein the magnetoresistive elements are classified into groups, and the groups are provided in different layers.

2. The device of claim 1 , wherein:

each magnetoresistive element is an MTJ element comprising a first magnetic layer, a second magnetic layer and a non-magnetic layer provided between the first and second magnetic layers.

3. The device of claim 1 , wherein:

one end of each magnetoresistive element is connected to part of a corresponding one of the select transistors via a bottom contact, and

another end of each magnetoresistive element is connected to a corresponding one of the second wirings via a top contact.

4. The device of claim 1 , wherein:

the select transistors are vertical transistors, and

the substrate comprises a substrate diffusion layer to be source lines below the gate electrodes.

5. The device of claim 1 , wherein:

the magnetoresistive elements are divided into a first group in a first layer and a second group in a second layer,

each of the first and second groups are provided at apexes of a square when viewed from the surface of the substrate, and

the magnetoresistive elements are arranged to have a square lattice structure when viewed in the direction perpendicular to the surface of the substrate.

6. A magnetoresistive memory device, comprising:

a substrate comprising word lines arranged parallel to each other and select transistors using the word lines as gates electrodes;

bottom contacts provided on the substrate and connected to part of the select transistors, respectively;

magnetoresistive elements provided on the bottom contacts, respectively;

top contacts provided on the magnetoresistive elements, respectively;

an interlayer insulating film provided to cover sides of the magnetoresistive elements, the top contacts and the bottom contacts; and

bit lines provided on the interlayer insulating film, each connecting several of the top contacts, arranged parallel to each other and crossing the word lines when viewed in a direction perpendicular to a surface of the substrate,

wherein the magnetoresistive elements are classified into groups, and

wherein the groups are provided in different layers.

7. The device of claim 6 , wherein:

each magnetoresistive element is an MTJ element comprising a first magnetic layer, a second magnetic layer and a non-magnetic layer provided between the first and second magnetic layers.

8. The device of claim 6 , wherein:

the select transistors are vertical transistors, and

the substrate comprises a substrate diffusion layer to be source lines below the gate electrodes.

9. The device of claim 6 , wherein:

the magnetoresistive elements are divided into a first group in a first layer, a second group in a second layer and a third group in a third layer,

each of the first to third groups are provided at apexes of an equilateral triangle when viewed from the surface of the substrate, and

the magnetoresistive elements are arranged to have a hexagonal close-packed structure when viewed in the direction perpendicular to the surface of the substrate.

10. The device of claim 6 , wherein:

the magnetoresistive elements are divided into a first group in a first layer and a second group in a second layer,

each of the first and second groups are provided at apexes of a square when viewed from the surface of the substrate, and

the magnetoresistive elements are arranged to have a square lattice structure when viewed in the direction perpendicular to the surface of the substrate.

11. A magnetoresistive memory device, comprising:

first wirings arranged parallel to each other in or on a substrate;

second wirings arranged parallel to each other above the substrate to cross the first wirings when viewed in a direction perpendicular to a surface of the substrate; and

magnetoresistive elements provided corresponding to intersections of the first and second wirings, respectively,

wherein the magnetoresistive elements are divided into a first group in a first layer, a second group in a second layer and a third group in a third layer,

wherein the first to third groups are provided at apexes of an equilateral triangle, respectively, when viewed from the surface of the substrate, and

wherein the magnetoresistive elements are arranged to have a hexagonal close-packed structure when viewed in the direction perpendicular to the surface of the substrate.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0563 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2017
From: SANUKI, TOMOYA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 042375/0295 →
Continuity (2)
Provisional Application 62301945 · Mar 1, 2016
Related Publication 20170256584A1 · Sep 7, 2017
Cited By (1)
US 12,315,541