IP Library Granted Patent US 9,806,686
Granted Patent B1
US 9,806,686 · App. 15/272,828 · Granted Oct 31, 2017

Linear variable gain amplifier

Inventor: Guojun Ren (San Jose, CA)
Assignee: INPHI CORPORATION
H03G1/0029H03F3/45179H03F2203/45022H03F2203/45154
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Quick Facts
Patent No.
US 9,806,686
App. No.
15/272,828
Granted
Oct 31, 2017
Kind
B1
Abstract

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a variable gain amplifier that includes a first transistor and a second transistor whose gate terminals are coupled to a first input terminal. A first drain terminal of the first transistor and a first source terminal of the second transistor is coupled to a voltage gain control switch. There are other embodiments as well.

Claims (39)

1. A variable gain amplifier (VGA) device comprising:

a first input terminal and a second input terminal;

a first NMOS switch comprising a first source terminal, a first drain terminal, and a first gate terminal, the first gate terminal being coupled to the first input terminal;

a second NMOS switch comprising a second source terminal, a second drain terminal, and a second gate terminal, the second drain terminal being coupled to the first source terminal, the second source terminal being coupled to a ground terminal, the second gate terminal being coupled to the first input terminal;

a third NMOS switch comprising a third drain terminal, a third source terminal, and a third gate terminal, the third gate terminal being coupled to the second input terminal;

a fourth NMOS switch comprising a fourth drain terminal, a fourth source terminal, and a fourth gate terminal, the fourth gate terminal being coupled to the second input terminal, the fourth source terminal being coupled to the ground terminal; and

a voltage control module comprising a control terminal, the voltage control module being coupled to the first source terminal and the second drain terminal.

2. The device of claim 1 wherein the voltage control module further being coupled to the third source terminal and the fourth drain terminal.

3. The device of claim 1 wherein the voltage control module comprises a fifth source terminal and a fifth drain terminal, the fifth source terminal being coupled to the first source terminal and the second drain terminal, the fifth drain terminal being coupled to the third source terminal and the fifth drain terminal.

4. The device of claim 1 further comprising a first output terminal and a second output terminal, the first output terminal being coupled to the first drain terminal, the second output terminal being coupled to the third drain terminal.

5. The device of claim 1 further comprising a load resistor coupled to the first drain terminal.

6. The device of claim 1 wherein the voltage control module comprises an NMOS transistor, a gate terminal of the NMOS transistor being coupled to the control terminal.

7. The device of claim 1 wherein the voltage control module comprises an NMOS transistor, the NMOS transistor comprising a fifth source terminal and a fifth drain terminal, the fifth source terminal being coupled to the first source terminal and the second drain terminal, the fifth drain terminal being coupled to the third source terminal and the fourth drain terminal.

8. The device of claim 1 further comprising a fifth switch, the first drain terminal being coupled to a voltage source via the fifth switch.

9. The device of claim 8 wherein the fifth switch comprises an NMOS transistor, the NMOS transistor comprising a fifth gate terminal coupled to a pump resistor.

10. The device of claim 8 wherein the fifth switch is coupled to an output terminal.

11. The device of claim 1 wherein the first NMOS switch is characterized by a first transconductance value and the second NMOS switch is characterized by a second transconductance value, the first transconductance value being at least twice larger than the first transconductance value.

12. A variable gain amplifier (VGA) device comprising:

a first input terminal and a second input terminal;

a first NMOS switch comprising a first source terminal, a first drain terminal, and a first gate terminal, the first gate terminal being coupled to the first input terminal;

a second NMOS switch comprising a second source terminal, a second drain terminal, and a second gate terminal, the second drain terminal being coupled to the first source terminal, the second source terminal being coupled to a ground terminal, the second gate terminal being coupled to the first input terminal;

a third NMOS switch comprising a third drain terminal, a third source terminal, and a third gate terminal, the third gate terminal being coupled to the second input terminal;

a fourth NMOS switch comprising a fourth drain terminal, a fourth source terminal, and a fourth gate terminal, the fourth gate terminal being coupled to the second input terminal, the fourth source terminal being coupled to the ground terminal; and

a fifth NMOS switch comprising a fifth drain terminal, a fifth source terminal, and a fifth gate terminal, the fifth gate terminal being coupled to a voltage control terminal, the fifth source terminal being coupled to the first source terminal and the second drain terminal, the fifth drain terminal being coupled to the third source terminal and the second drain terminal.

13. The device of claim 12 further comprising a first common mode resistor configured in series with a second common mode resistor, the first common mode resistor being coupled to the first drain terminal, the second common mode resistor being coupled to the third drain terminal.

14. The device of claim 12 wherein the VGA device is characterized by a first gain value and the fifth NMOS switch is characterized by a second gain value, the first gain value being substantially equal to the second gain value.

15. A variable gain amplifier (VGA) device comprising:

a first input terminal and a second input terminal;

a first load resistor and a second load resistor;

a first PMOS switch comprising a first source terminal, a first drain terminal, and a first gate terminal, the first gate terminal being coupled to the first input terminal;

a second PMOS switch comprising a second source terminal, a second drain terminal, and a second gate terminal, the second source terminal being coupled to the first drain terminal, the second drain terminal being coupled to the first load resistor, the second gate terminal being coupled to the first input terminal;

a third PMOS switch comprising a third drain terminal, a third source terminal, and a third gate terminal, the third gate terminal being coupled to the second input terminal;

a fourth PMOS switch comprising a fourth drain terminal, a fourth source terminal, and a fourth gate terminal, the fourth gate terminal being coupled to the second input terminal, the fourth drain terminal being coupled to the second load resistor; and

a voltage control module comprising a control terminal, the voltage control module being coupled to the first drain terminal and the second source terminal.

16. The device of claim 15 wherein the voltage control module comprises a PMOS transistor.

17. The device of claim 15 wherein the second drain terminal is coupled to a first output terminal and the fourth drain terminal is coupled to a second output terminal.

18. The device of claim 15 wherein the first load resistor is coupled to a ground terminal.

19. The device of claim 15 wherein the first source terminal is coupled to a voltage source.

20. The device of claim 15 the VGA device is characterized by a first gain value and the voltage control module is characterized by a second gain value, the first gain value being substantially equal to the second gain value.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2016
From: REN, GUOJUN
To: INPHI CORPORATION
Reel/Frame 039837/0232 →