IP Library Granted Patent US 9,954,576
Granted Patent B2
US 9,954,576 · App. 15/274,579 · Granted Apr 24, 2018

System and method for PAM-4 transmitter bit equalization for improved channel performance

Inventors: Arun R. Chada (Round Rock, TX); Bhyrav M. Mutnury (Round Rock, TX); Jiayi He (Round Rock, TX)
Assignee: DELL PRODUCTS, LP
H04B3/04H04L25/03343H04L25/03878
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,954,576
App. No.
15/274,579
Granted
Apr 24, 2018
Kind
B2
Abstract

A method includes receiving a serial data stream at a transmitter of a serial channel, encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time, determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme, and, in response, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

Claims (60)

1. A method, comprising:

receiving, at a transmitter of a serial channel, a serial data stream;

encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time;

determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme; and

in response to determining that the first symbol is represented as the highest state, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

2. The method of claim 1 , further comprising:

determining that a second symbol of the encoded serial data stream is represented as a lowest state of the PAM-4 scheme; and

in response to determining that the second symbol is represented as the lowest state, providing a second output signal on the output, wherein the second output signal comprises a third portion at a third voltage level associated with the lowest state for a first half of a second unit interval of time associated with the second symbol, followed by a fourth portion at a fourth voltage level associated with a de-emphasized lowest state of the PAM-4 scheme for a second half of the second unit interval of time.

3. The method of claim 1 , wherein:

a first symbol represents a bit sequence comprising a digital 0 followed by a digital 0, and is represented in the PAM-4 scheme by a lowest state;

a second symbol represents a bit sequence comprising a digital 0 followed by a digital 1, and is represented in the PAM-4 scheme by a first higher state, wherein the first higher state is higher than the lowest state;

a third symbol represents a bit sequence comprising a digital 1 followed by a digital 0, and is represented in the PAM-4 scheme by a second higher state, wherein the second higher state is higher than the first higher state; and

a fourth symbol represents a bit sequence comprising a digital 1 followed by a digital 1, and is represented in the PAM-4 scheme by a highest state, wherein the highest state is higher than the second higher state.

4. The method of claim 1 , further comprising:

sending the output signal to a receiver via a transmission channel.

5. The method of claim 4 , further comprising:

equalizing, at the receiver, the output signal; and

decoding the output signal to recover the serial data stream.

6. The method of claim 1 , wherein the de-emphasized highest state comprises one of 20 de-emphasis levels, each de-emphasis level prescribing a different amount of de-emphasis.

7. The method of claim 6 , wherein the different amounts of de-emphasis comprise de-emphasis levels 0.5 dB to 10 dB, in 0.5 dB steps.

8. The method of claim 1 , wherein the transmitter comprises a transmitter of a PCI-e link.

9. A serial data channel, comprising:

a transmitter; and

a receiver configured to receive an output signal from the transmitter;

the transmitter configured to:

receive a serial data stream;

encode the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time;

determine that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme; and

in response to determining that the first symbol is represented as the highest state, provide a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

10. The serial data channel of claim 9 , the transmitter further configured to:

determine that a second symbol of the encoded serial data stream is represented as a lowest state of the PAM-4 scheme; and

in response to determining that the second symbol is represented as the lowest state, provide a second output signal on the output, wherein the second output signal comprises a third portion at a third voltage level associated with the lowest state for a first half of a second unit interval of time associated with the second symbol, followed by a fourth portion at a fourth voltage level associated with a de-emphasized lowest state of the PAM-4 scheme for a second half of the second unit interval of time.

11. The serial data channel of claim 9 , wherein:

a first symbol represents a bit sequence comprising a digital 0 followed by a digital 0, and is represented in the PAM-4 scheme by a lowest state;

a second symbol represents a bit sequence comprising a digital 0 followed by a digital 1, and is represented in the PAM-4 scheme by a first higher state, wherein the first higher state is higher than the lowest state;

a third symbol represents a bit sequence comprising a digital 1 followed by a digital 0, and is represented in the PAM-4 scheme by a second higher state, wherein the second higher state is higher than the first higher state; and

a fourth symbol represents a bit sequence comprising a digital 1 followed by a digital 1, and is represented in the PAM-4 scheme by a highest state, wherein the highest state is higher than the second higher state.

12. The serial data channel of claim 9 , the transmitter further configured to:

send the output signal to the receiver via a transmission channel.

13. The serial data channel of claim 12 , the receiver configured to:

equalize the output signal; and

decode the output signal to recover the serial data stream.

14. The serial data channel of claim 9 , wherein the de-emphasized highest state comprises one of 20 de-emphasis levels, each de-emphasis level prescribing a different amount of de-emphasis.

15. The serial data channel of claim 14 , wherein the different amounts of de-emphasis comprise de-emphasis levels 0.5 dB to 10 dB, in 0.5 dB steps.

16. The serial data channel of claim 9 , wherein the serial data channel comprises a PCI-e link.

17. A non-transitory computer-readable medium including code for performing a method, the method comprising:

receiving, at a transmitter of a serial channel, a serial data stream;

encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time;

determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme; and

in response to determining that the first symbol is represented as the highest state, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

18. The computer-readable medium of claim 17 , the method further comprising:

determining that a second symbol of the encoded serial data stream is represented as a lowest state of the PAM-4 scheme; and

in response to determining that the second symbol is represented as the lowest state, providing a second output signal on the output, wherein the second output signal comprises a third portion at a third voltage level associated with the lowest state for a first half of a second unit interval of time associated with the second symbol, followed by a fourth portion at a fourth voltage level associated with a de-emphasized lowest state of the PAM-4 scheme for a second half of the second unit interval of time.

19. The computer-readable medium of claim 17 , wherein:

a first symbol represents a bit sequence comprising a digital 0 followed by a digital 0, and is represented in the PAM-4 scheme by a lowest state;

a second symbol represents a bit sequence comprising a digital 0 followed by a digital 1, and is represented in the PAM-4 scheme by a first higher state, wherein the first higher state is higher than the lowest state;

a third symbol represents a bit sequence comprising a digital 1 followed by a digital 0, and is represented in the PAM-4 scheme by a second higher state, wherein the second higher state is higher than the first higher state; and

a fourth symbol represents a bit sequence comprising a digital 1 followed by a digital 1, and is represented in the PAM-4 scheme by a highest state, wherein the highest state is higher than the second higher state.

20. The computer-readable medium of claim 17 , the method further comprising:

sending the output signal to a receiver via a transmission channel.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040679/0386) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0666 →
RELEASE OF SECURITY INTEREST AT REEL 040633 FRAME 0799 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
Reel/Frame 058297/0427 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Nov 23, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 040679/0386 →
SECURITY INTEREST Recorded Nov 16, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040633/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2016
From: CHADA, ARUN R.; MUTNURY, BHYRAV M.; HE, JIAYI
To: DELL PRODUCTS, LP
Reel/Frame 039960/0843 →
Continuity (1)
Related Publication 20180091189A1 · Mar 29, 2018