Semiconductor memory device with operation environment information storing circuit and command storing function
A semiconductor memory device which stores operation environment information such as use time data, operating temperature data, or operating voltage data includes an internal circuit configured to perform a function set in the semiconductor memory device, and an operation environment information storing circuit configured to sense information about an operation environment of the semiconductor memory device when the semiconductor memory device operates, store the operation environment information in non-volatile memory cells, and provide the operation environment information stored in the non-volatile memory cells to an outside based on a request of reading out information.
1. A memory system comprising:
a semiconductor memory device comprising
an internal circuit configured to perform a function set in the semiconductor memory device, and
an operation environment information storing circuit configured to sense information about an operation environment of the semiconductor memory device when the semiconductor memory device operates, and store operation environment information in non-volatile memory cells based on the sensed information; and
a memory controller configured to read the operation environment information stored in the non-volatile memory cells, and predict an exchange time for replacing the semiconductor memory device based on the operation environment information read from the non-volatile memory cells.
2. The memory system of claim 1 , wherein the non-volatile memory cells comprise MRAM cells.
3. The memory system of claim 1 , wherein the operation environment information comprises use time data representing a use time of the semiconductor memory device.
4. The memory system of claim 1 , wherein the operation environment information comprises operating voltage data representing an operating voltage of the semiconductor memory device.
5. The memory system of claim 1 , wherein the operation environment information comprises operating temperature data representing an operating temperature of the semiconductor memory device.
6. The memory system of claim 1 , further comprising a delay circuit configured to provide delay signals to adjust delay times of the internal circuit and to change a delay degree of the delay signals responsive to the operation environment information.
7. The memory system of claim 1 , wherein the operation environment information comprises use time data obtained by cumulatively totaling a duration time of a power-on state of the semiconductor memory device.
8. The memory system of claim 1 , wherein the operation environment information storing circuit is further configured to generate an adjustment control signal responsive to the operation environment information, and the internal circuit is configured to change operation parameters of the internal circuit responsive to the adjustment control signal.
9. The memory system of claim 1 , wherein the memory controller is further configured to provide an alarm signal informing that the semiconductor memory device should be replaced based on the predicted exchange time.
10. The memory system of claim 1 , wherein the operation environment information storing circuit is configured to store the operation environment information in units of predetermined periods.
11. The memory system of claim 1 , further comprising a buffer circuit configured to buffer data in the internal circuit and to adjust buffering responsive to the operation environment information.
12. A semiconductor memory device comprising:
an internal circuit configured to perform a function set in the semiconductor memory device;
an operation environment information storing circuit configured to sense information about an operation environment of the semiconductor memory device when the semiconductor memory device operates, store operation environment information in non-volatile memory cells based on the sensed information, and provide the operation environment information stored in the non-volatile memory cells externally of the semiconductor memory device in response to a request for reading out information; and
a buffer circuit configured to buffer data in the internal circuit and to adjust buffering responsive to the operation environment information stored in the non-volatile memory cells.