IP Library Granted Patent US 10,515,300
Granted Patent B2
US 10,515,300 · App. 15/278,572 · Granted Dec 24, 2019

High speed serial links for high volume manufacturing

Inventors: Douglas E. Wallace (Round Rock, TX); Bhyrav M. Mutnury (Round Rock, TX)
Assignee: Dell Products, LP
G06N3/02G06F17/5036
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Quick Facts
Patent No.
US 10,515,300
App. No.
15/278,572
Granted
Dec 24, 2019
Kind
B2
Abstract

An information handling system includes a memory that stores code, and a processor that executes code stored in memory to derive a distribution of impedances for parameters of a trace within a printed circuit board (PCB). The processor further to determine impedance corners of the distribution of impedances, to select the impedance corners as first, second, and third trace models, and to derive first, second, and third distribution of losses based on the first, second, and third trace models. The processor further to store loss corners of the first, second, and third distribution of losses as modeling points, and to determine whether all of modeling points pass within tolerance levels of loss and impedance of the trace.

Claims (51)

1. A method comprising:

deriving, by an Artificial Neural Network (ANN), a distribution of impedances of a trace within a printed circuit board (PCB) based on input parameters for the trace;

determining first, second, and third impedance corners of the distribution of impedances;

selecting, by the ANN, the first impedance corner as a first trace model, the second impedance corner as a second trace model, and the third impedance corner as a third trace model;

deriving, by the ANN, a first distribution of losses based on the first trace model, a second distribution of losses based on the second trace model, and a third distribution of losses based on the third trace model;

storing loss corners of the first, second, and third distribution of losses as modeling points;

determining whether all of the modeling points pass within tolerance levels of loss impedance values for the trace; and

building the PCB based on parameters of the trace defined in the modeling points in response to all of the model points passing within the tolerance levels.

2. The method of claim 1 , further comprising:

training the ANN prior to deriving the distribution of impedances by the ANN.

3. The method of claim 1 , further comprising:

plotting the modeling points on a loss versus impedance plot.

4. The method of claim 1 , further comprising:

providing the distribution of impedances prior to determining first, second, and third impedance corners of the distribution of impedances.

5. The method of claim 1 , wherein the distribution of impedances is divided in different bins, and each bins has a different number of results.

6. The method of claim 1 , wherein the high impedance and the low impedance are a predetermine location away from the nominal impedance within the distribution of impedances.

7. The method of claim 1 , wherein the training of the ANN utilizes a fewer number of simulations than a number of simulations utilized to derive the distribution of impedances.

8. A non-transitory computer-readable medium including code for performing a method, the method comprising:

deriving, by an Artificial Neural Network (ANN), a distribution of impedances of a trace within a printed circuit board (PCB) based on input parameters for the trace;

determining first, second, and third impedance corners of the distribution of impedances;

selecting, by the ANN, the first impedance corner as a first trace model, the second impedance corner as a second trace model, and the third impedance corner as a third trace model;

deriving, by the ANN, a first distribution of losses based on the first trace model, a second distribution of losses based on the second trace model, and a third distribution of losses based on the third trace model;

storing loss corners of the first, second, and third distribution of losses as modeling points;

determining whether all of the modeling points pass within tolerance levels of loss impedance values for the traces; and

building the PCB based on ammeters of the trace defined in the modeling points in response to all of the model to all model points passing within the tolerance levels.

9. The computer-readable medium of claim 8 , wherein the PCB is built based on parameters defined in the modeling points in response to all of the model points passing within the tolerance levels.

10. The computer-readable medium of claim 8 , the method further comprising:

training the ANN prior to deriving the distribution of impedances by the ANN.

11. The computer-readable medium of claim 8 , further comprising:

plotting the modeling points on a loss versus impedance plot.

12. The computer-readable medium of claim 8 , further comprising:

providing the distribution of impedances prior to determining first, second, and third impedance corners of the distribution of impedances.

13. The computer-readable medium of claim 8 , wherein the distribution of impedances is divided in different bins, and each bins has a different number of results.

14. The computer-readable medium of claim 8 , wherein the high impedance and the low impedance are a predetermine location away from the nominal impedance within the distribution of impedances.

15. An information handling system comprising:

a memory; and

a processor that executes code stored in memory to:

derive by an Artificial Neural Network ANN), a distribution of impedances of a trace within a printed circuit board (PCB) based on input parameters for the trace;

determine first, second, and third impedance corners of the distribution of impedances;

select, by the ANN, the first impedance corner as a first trace model, the second impedance corner as a second trace model, and the third impedance corner as a third trace model;

derive, by the ANN, a first distribution of losses based on the first trace model, a second distribution of losses based on the second trace model, and a third distribution of losses based on the third trace model;

store loss corners of the first, second, and third distribution of losses as modeling, points;

determine whether all of the modeling points pass within tolerance levels of loss impedance values for the trace; and

build the PUB based on parameters of the trace defined in the modeling points in response to all of the model points passing within the tolerance levels.

16. The information handling system of claim 15 , wherein the PCB is built based on parameters defined in the modeling points in response to all of the model points passing within the tolerance.

17. The information handling system of claim 15 , the processor further to:

plot the modeling points on the loss versus impedance plot.

18. The information handling system of claim 15 , the processor further to:

provide the distribution of impedances prior to determining first, second, and third impedance corners of the distribution of impedances.

19. The information handling system of claim 15 , wherein the distribution of impedances is divided in different bins, and each bins has a different number of results.

20. The information handling system of claim 15 , wherein the high impedance and the low impedance are a predetermine location away from the nominal impedance within the distribution of impedances.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040679/0386) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0666 →
RELEASE OF SECURITY INTEREST AT REEL 040633 FRAME 0799 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
Reel/Frame 058297/0427 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Nov 23, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 040679/0386 →
SECURITY INTEREST Recorded Nov 16, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040633/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2016
From: WALLACE, DOUGLAS E.; MUTNURY, BHYRAV M.
To: DELL PRODUCTS, LP
Reel/Frame 040217/0245 →
Continuity (1)
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