IP Library Granted Patent US 10,146,289
Granted Patent B2
US 10,146,289 · App. 15/282,497 · Granted Dec 4, 2018

Power system utilizing processor core performance state control

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Quick Facts
Patent No.
US 10,146,289
App. No.
15/282,497
Granted
Dec 4, 2018
Kind
B2
Abstract

An information handling system includes a power supply coupled to a processor that includes a plurality of cores. A power system controller is coupled to the power supply and the processor. The power system controller may set each of the plurality of cores to a performance state that is below a highest performance state. The power system controller may then determine whether the power supplied from the power supply to the processor during operation is sufficient to operate each of the plurality of cores at the highest performance state. In response to the power being insufficient to operate each of the plurality of cores at the highest performance state, the power system controller may control the plurality of cores such that a subset operate at the highest performance state and the remainder operate at a performance state that is lower than the highest performance state.

Claims (53)

1. A power system, comprising

a powered system including a plurality of subsystems that are each configured to operate in a plurality of different frequencies that each provide a respective performance state;

a power system controller that is coupled to each of the plurality of subsystems in the powered system through a respective dedicated power connection, and that is configured to couple to a power supply, wherein the power system controller is configured to:

control power provided from the power supply to the respective dedicated power connection for each of the plurality of subsystems in the powered system such that each of the plurality of subsystems operate at a respective performance state;

identify at least one workload that is to be performed using at least some of the plurality of subsystems and that is associated with a workload-based power budget; and

control, in response to identifying the at least one workload, power provided from the power supply to the respective dedicated power connection for each of the plurality of subsystems such that a subset of the plurality of subsystems operate at a highest frequency that provides the highest performance state and the remainder of the plurality of subsystems operate at least one frequency that provides a performance state that is lower than the highest performance state using the workload-based power budget such that the plurality of subsystems perform the at least one workload according to the workload-based power budget.

2. The power system of claim 1 , wherein the controlling power provided from the power supply to the respective dedicated power connection for each of the plurality of subsystems such that the subset of the plurality of subsystems operate at the highest frequency that provides the highest performance state and the remainder of the plurality of subsystems operate at the at least one frequency that provides the performance state that is lower than the highest performance state ensures that only a predetermined number of the subsystems are capable of demanding a subsystem peak power amount.

3. The power system of claim 1 , wherein the power system controller is further configured to:

retrieve a powered system configuration; and

determine a power-supply-based power budget for the powered system using the powered system configuration, wherein the at least one frequency that provides the performance state that is lower than the highest performance state is selected using the power-supply-based power budget such that the powered system does not demand power that exceeds the power-supply-based power budget.

4. The power system of claim 1 , wherein the power system controller is further configured to:

monitor a dynamic power demand of the powered system; and

control power provided from the power supply to the respective dedicated power connection for each of the plurality of subsystems such that the plurality of subsystems included in the subset of the plurality of subsystems that operate at the highest frequency that provides the highest performance state changes.

5. The power system of claim 1 , wherein the power system controller is coupled to at least one database that includes operation data for the plurality of subsystems in the powered system.

6. The power system of claim 5 , wherein the power system controller is further configured to:

retrieve the operation data for the plurality of subsystems from the at least one database; and

use the operation data along with the workload-based power budget to control power provided from the power supply to the respective dedicated power connection for each of the plurality of subsystems such that the subset of the plurality of subsystems operate at the highest frequency that provides the highest performance state and the remainder of the plurality of subsystems operate at the at least one frequency that provide the performance state that is lower than the highest performance state.

7. The power system of claim 1 , wherein the highest performance state makes a transient high power demand performance feature available in the plurality of subsystems, and wherein the performance state that is lower than the highest performance state makes the transient high power demand performance feature unavailable in the plurality of subsystems.

8. An information handling system (IHS), comprising:

a power supply;

a processor coupled to the power supply and including a plurality of cores;

a memory coupled to the processor; and

a power system controller that is coupled to the power supply and to each of the plurality of cores in the processor through a respective voltage plane, wherein the power system controller is configured to:

control power provided from the power supply to the respective voltage plane for each of the plurality of cores in the processor such that each of the plurality of cores operate at a respective performance state;

identify at least one workload that is to be performed using at least some of the plurality of cores and that is associated with a workload-based power budget; and

control, in response to identifying the at least one workload, power provided from the power supply to the respective voltage plane for each of the plurality of cores such that a subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at a performance state that is lower than the highest performance state such that the plurality of scores perform the at least one workload according to the workload-based power budget.

9. The IHS of claim 8 , wherein the controlling power provided from the power supply to the respective voltage plane for each of the plurality of cores such that the subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at the performance state that is lower than the highest performance state ensures that only a predetermined number of the cores are capable of demanding a core peak power amount.

10. The IHS of claim 8 , wherein the power system controller is further configured to:

retrieve an IHS configuration; and

determine a power-supply-based power budget for the processor using the IHS configuration, wherein the performance state that each of the plurality of cores operate at and that is below the highest performance state is selected using the power-supply-based power budget such that the processor does not demand power that exceeds the power-supply-based power budget.

11. The IHS of claim 8 , wherein the power system controller is further configured to:

monitor a dynamic power demand of the processor; and

control power provided from the power supply to the respective voltage plane for each of the plurality of cores such that the plurality of cores included in the subset of the plurality of cores that operate at the highest performance state changes.

12. The IHS of claim 8 , wherein the power system controller is coupled to at least one database that includes operation data for the plurality of cores in the processor.

13. The IHS of claim 12 , wherein the power system controller is further configured to:

retrieve the operation data for the plurality of cores from the at least one database; and

use the operation data along with the workload-based power budget to control power provided from the power supply to the respective voltage plane for each of the plurality of cores such that the subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at the performance state that is lower than the highest performance state.

14. The IHS of claim 8 , wherein the highest performance state makes a transient high power demand performance feature available in the plurality of cores, and wherein the performance state that is lower than the highest performance state makes the transient high power demand performance feature unavailable in the plurality of cores.

15. A method for power supply output capability processor control in an information handling system (IHS), comprising:

controlling power provided from a power supply to a respective voltage plane coupled to each of a plurality of cores in a processor such that each of the plurality of cores operate at a respective performance state;

identifying at least one workload that is to be performed using at least some of the plurality of cores and that is associated with a workload-based power budget; and

controlling, in response to identifying the at least one workload, power provided from the power supply to the respective voltage plane coupled to each of the plurality of cores such that a subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at a performance state that is lower than the highest performance state such that the plurality of cores perform the at least one workload according to the workload-based power budget.

16. The method of claim 15 , wherein the controlling power provided from the power supply to the respective voltage plane coupled to each of the plurality of cores such that the subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at the performance state that is lower than the highest performance state ensures that only a predetermined number of the cores are capable of demanding a cores peak power amount.

17. The method of claim 15 , further comprising:

retrieving an IHS configuration; and

determining a power-supply-based power budget for the processor using the IHS configuration, wherein the performance state that each of the plurality of cores operate at and that is below the highest performance state is selected using the power-supply-based power budget such that the processor does not demand power that exceeds the power-supply-based power budget.

18. The method of claim 15 , further comprising:

monitoring a dynamic power demand of the processor; and

controlling power provided from the power supply to the respective voltage plane coupled to each of the plurality of cores such that the plurality of cores included in the subset of the plurality of cores that operate at the highest performance state changes.

19. The method of claim 15 , wherein at least one database includes operation data for the plurality of cores in the processor, and wherein the method further comprises:

retrieving the operation data for the plurality of cores from the at least one database; and

using the operation data along with the workload-based power budget to control power provided from the power supply to the respective voltage plane coupled to each of the plurality of cores such that the subset of the plurality of cores operate at the highest performance state and the remainder of the plurality of cores operate at the performance state that is lower than the highest performance state.

20. The method of claim 15 , wherein the highest performance state makes a transient high power demand performance feature available in the plurality of cores, and wherein the performance state that is lower than the highest performance state makes the transient high power demand performance feature unavailable in the plurality of cores.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040679/0386) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0666 →
RELEASE OF SECURITY INTEREST AT REEL 040633 FRAME 0799 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL INTERNATIONAL, L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
Reel/Frame 058297/0427 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Nov 23, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 040679/0386 →
SECURITY INTEREST Recorded Nov 16, 2016
From: DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; WYSE TECHNOLOGY L.L.C.; EMC CORPORATION
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040633/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2016
From: KHATRI, MUKUND P.; ARTMAN, PAUL T.; KHALID, HUMAYUN; MOLLOY, MICHAEL KARL
To: DELL PRODUCTS L.P.
Reel/Frame 039912/0989 →