Granted Patent B2

US 9,733,976 · App. 15/283,910 · Granted Aug 15, 2017

Inventors: Kirk R. Swidowski (Manteca, CA); Ryan J. Berg (Austin, TX); Stephen C. Carlucci (Lunenburg, MA); John J. Danahy (Bow, NH)

Assignee: Barkly Protects, Inc.

G06F9/45558G06F21/552G06F21/554G06F2009/45583G06F2009/45591

Abstract

Claims (117)

1. A security system for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the system comprising:

an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, the in-band software monitor configured to intercept system calls made from an MSR (Model Specific Register) of the processor, to execute monitoring operations, and to subsequently return execution to the OS;

an out-of-band hypervisor communicably coupled to the OS, the hypervisor having read shadow means for trapping read requests to the MSR, and write mask means for trapping write requests to the MSR;

the hypervisor having means for responding to the trapped read requests and trapped write requests;

the processor having an instruction set architecture (ISA) including a system return (sysret) instruction configured to effect a return of execution from the OS to an application running on the computer; and

sysret monitoring means for intercepting calls to the sysret instruction, for executing sysret monitoring operations, and for subsequently effecting said return of execution;

wherein the in-band software monitor comprises a monitor program stored on the memory and executable by the processor, the monitor program configured to:

receive system calls;

execute system monitoring operations;

forward the in-band software monitor's base address and size in memory to the hypervisor;

forward the in-band software monitor's entry point address to the hypervisor; and

forward a state of the MSR to the hypervisor.

2. The system of claim 1 , wherein the hypervisor comprises a hypervisor program stored on the memory and executable by the processor, the hypervisor program configured to:

mark the monitor program and data associated with the in-band software monitor as read-only and/or as executable-only, using one or more extended page table (EPT) entries and/or input-output memory management unit (IOMMU) entries;

save the state of the MSR to a substitute MSR; and

update the MSR with the in-band software monitor's entry point address.

3. The system of claim 1 , wherein the read shadow means comprises:

a substitute MSR containing substitute state information, the substitute state information being different than the state information contained in the MSR; and

software stored on the memory and executable by the processor, configured to:

capture read requests of the MSR; and

responsive to the captured read requests, return the substitute state information from the substitute MSR.

4. The system of claim 1 , wherein the write mask means comprises:

a substitute MSR containing substitute state information, the substitute state information being different than the state information contained in the MSR; and

software stored on the memory and executable by the processor, configured to:

capture write requests to the MSR; and

responsive to the captured write requests, write the substitute state information from the substitute MSR to the MSR.

5. The system of claim 1 , wherein the MSR comprises an IA32LSTAR register.

6. A security system for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the system comprising:

an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, the in-band software monitor configured to intercept system calls made from an MSR (Model Specific Register) of the processor, to execute monitoring operations, and to subsequently return execution to the OS;

an out-of-band hypervisor communicably coupled to the OS, the hypervisor having read shadow means for trapping read requests to the MSR, and write mask means for trapping write requests to the MSR;

the hypervisor having means for responding to the trapped read requests and trapped write requests;

the processor having an instruction set architecture (ISA) including a system return (sysret) instruction configured to effect a return of execution from the OS to an application running on the computer; and

sysret monitoring means for intercepting calls to the sysret instruction, for executing sysret monitoring operations, and for subsequently effecting said return of execution;

further comprising one or more extended page table (EPT) configured to translate virtual addresses (VAs) generated by the OS to guest physical addresses (GPAs), and to resolve the GPAs to physical addresses (PAs) of the computer, the EPT being further configured to mark the software and data associated with the in-band software monitor as read-only and/or as executable-only, wherein the presence of the in-band software monitor is obscured from detection by code signature scanning.

7. A security system for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the system comprising:

an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, the in-band software monitor configured to intercept system calls made from an MSR (Model Specific Register) of the processor, to execute monitoring operations, and to subsequently return execution to the OS;

an out-of-band hypervisor communicably coupled to the OS, the hypervisor having read shadow means for trapping read requests to the MSR, and write mask means for trapping write requests to the MSR;

the hypervisor having means for responding to the trapped read requests and trapped write requests;

the processor having an instruction set architecture (ISA) including a system return (sysret) instruction configured to effect a return of execution from the OS to an application running on the computer; and

sysret monitoring means for intercepting calls to the sysret instruction, for executing sysret monitoring operations, and for subsequently effecting said return of execution;

wherein said sysret monitoring means comprises:

a return address register containing a return address accessible by the sysret instruction for said return of execution;

a fault-generating substitute return address stored in the memory and accessible by the in-band software monitor, the in-band software monitor configured to receive execution upon generation of a fault; and

said in-band software monitor being further configured to:

read the return address from the return address register, and write the return address to the memory;

write the substitute return address to the return address register, wherein calls to the sysret instruction access the substitute return address and generate a fault sending execution to the in-band software monitor.

8. The system of claim 7 , wherein said in-band software monitor is further configured to, in response to said sending execution to the in-band software monitor:

receive said execution, including results generated by the OS for an event of interest; and

effect said sysret monitoring operations by inspecting said results.

9. The system of claim 8 , wherein said in-band software monitor is further configured to, in response to said inspecting said results:

read the return address from memory;

write the return address to the return address register; and

send execution from the in-band software monitor to the OS;

wherein a subsequent call to the sysret instruction accesses the return address and sends execution to the application.

10. The system of claim 7 , wherein said sysret monitoring means is configured to selectively intercept calls to the sysret instruction, so that said sysret monitoring means is configured to intercept calls to the sysret instruction by events of interest identified by said monitoring operations.

11. A method for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the method comprising:

(a) intercepting, with an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, system calls made from an MSR (Model Specific Register) of the processor;

(b) executing, after said intercepting (a), monitoring operations with the in-band software monitor;

(c) returning, after said executing (b), execution to the OS;

(d) trapping, with read shadow means of an out-of-band hypervisor communicably coupled to the OS, read requests to the MSR;

(e) trapping, with write mask means of the out-of-band hypervisor, write requests to the MSR;

(f) responding, with the hypervisor, to the trapped read requests and trapped write requests;

(g) intercepting, with system return (sysret) monitoring means, calls to a sysret instruction;

(h) executing, with the sysret monitoring means, sysret monitoring operations; and

(i) returning, with the sysret monitoring means, execution from the OS to an application running on the computer;

wherein the software in-band software monitor comprises a monitor program stored on the memory and executable by the processor, the method further comprising the monitor program:

receiving system calls;

executing system monitoring operations;

forwarding the in-band software monitor's base address and size in memory to the hypervisor;

forwarding the in-band software monitor's entry point address to the hypervisor; and

forwarding a state of the MSR to the hypervisor.

12. The method of claim 11 , wherein the hypervisor comprises a program stored on the memory and executable by the processor, the method further comprising the hypervisor program:

marking the monitor program and data associated with the in-band software monitor as read-only and/or as executable-only, using one or more extended page table (EPT);

saving the state of the MSR to a substitute MSR; and

updating the MSR with the in-band software monitor's entry point address.

13. The method of claim 11 , wherein the read shadow means includes software stored on the memory and executable by the processor, the method further comprising the read shadow means:

capturing read requests of the MSR; and

responsive to the captured read requests, returning substitute state information from a substitute MSR, the substitute state information in the substitute MSR being different than the state information contained in the MSR.

14. The method of claim 11 , wherein the write mask means

software stored on the memory and executable by the processor, the method further comprising the write shadow means:

capturing write requests to the MSR; and

responsive to the captured write requests, writing the substitute state information from a substitute MSR to the MSR, the substitute state information in the substitute MSR being different than the state information contained in the MSR.

15. The method of claim 11 , wherein the MSR comprises an IA32LSTAR register.

16. A method for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the method comprising:

(a) intercepting, with an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, system calls made from an MSR (Model Specific Register) of the processor;

(b) executing, after said intercepting (a), monitoring operations with the in-band software monitor;

(c) returning, after said executing (b), execution to the OS;

(d) trapping, with read shadow means of an out-of-band hypervisor communicably coupled to the OS, read requests to the MSR;

(e) trapping, with write mask means of the out-of-band hypervisor, write requests to the MSR;

(f) responding, with the hypervisor, to the trapped read requests and trapped write requests;

(g) intercepting, with system return (sysret) monitoring means, calls to a sysret instruction;

(h) executing, with the sysret monitoring means, sysret monitoring operations; and

(i) returning, with the sysret monitoring means, execution from the OS to an application running on the computer;

further comprising using one or more extended page table (EPT) to translate virtual addresses (VAs) generated by the OS to guest physical addresses (GPAs), and to resolve the GPAs to physical addresses (PAs) of the computer, and marking the software and data associated with the in-band software monitor as read-only and/or as executable-only, wherein the presence of the in-band software monitor is obscured from detection by code signature scanning.

17. A method for efficiently monitoring and securing a computer including a memory and processor, to defend against malicious intrusions, the method comprising:

(a) intercepting, with an in-band software monitor disposed within a kernel in communication with an operating system (OS) of the computer, system calls made from an MSR (Model Specific Register) of the processor;

(b) executing, after said intercepting (a), monitoring operations with the in-band software monitor;

(c) returning, after said executing (b), execution to the OS;

(d) trapping, with read shadow means of an out-of-band hypervisor communicably coupled to the OS, read requests to the MSR;

(e) trapping, with write mask means of the out-of-band hypervisor, write requests to the MSR;

(f) responding, with the hypervisor, to the trapped read requests and trapped write requests;

(g) intercepting, with system return (sysret) monitoring means, calls to a sysret instruction;

(h) executing, with the sysret monitoring means, sysret monitoring operations; and

(i) returning, with the sysret monitoring means, execution from the OS to an application running on the computer;

further comprising, with said sysret monitoring means:

reading a return address from a return address register of said processor, the return address being accessible by the sysret instruction for said returning (i);

writing the return address to the memory;

writing a fault-generating substitute return address to the return address register, wherein calls to the sysret instruction access the substitute return address and generate a fault sending execution to the in-band software monitor.

18. The method of claim 17 , further comprising, in response to said sending execution to the in-band software monitor:

receiving said execution, including results generated by the OS for an event of interest; and

effect said sysret monitoring operations by inspecting said results.

19. The method of claim 18 , further comprising, in response to said inspecting said results:

reading the return address from memory;

writing the return address to the return address register; and

sending execution from the in-band software monitor to the OS;

wherein a subsequent call to the sysret instruction accesses the return address and sends execution to the application.

20. The method of claim 17 , further comprising, with said sysret monitoring means, selectively intercepting calls to the sysret instruction, wherein said sysret monitoring means intercepts calls to the sysret instruction by events of interest identified by said executing (b).

Assignments (18)

Continuity (5)