Data unit retransmission

1. A device including:

modulation circuitry including:

an input; and

modulated output; and

coding circuitry including a data unit output coupled to the input of the modulation circuitry, the coding circuitry configured to:

receive, from demodulation circuitry at a destination node, an indication of an error in a first data unit, the first data unit including:

a first bit; and

a second bit, where a modulation pattern used by the modulation circuitry to represent the second bit is determined responsive to the first bit;

responsive to the indication, determine to retransmit the first data unit;

alter the first data unit to generate a retransmission data unit by changing the first bit to alter the modulation pattern used by the modulation circuitry to represent the second bit; and

send the retransmission data unit to the modulation circuitry for transmission via the modulated output, the modulated output having the altered modulation pattern that differs from the modulation pattern of the previously transmitted first data unit.

2. The device of claim 1 , where the coding circuitry is configured to send the retransmission data unit to the modulation circuitry by sending the first bit ahead of the second bit.

3. The device of claim 1 , where the first bit includes a bit within a header of the first data unit.

4. The device of claim 3 , where the second bit includes a bit within a data payload of the first data unit.

5. The device of claim 4 , where the coding circuitry is configured to generate the retransmission data unit by preserving the data payload of the first data unit.

6. The device of claim 3 , where:

the header includes a Gfast Digital Subscriber Line (DSL) compliant header; and

the first bit includes a reserved auxiliary bit within the Gfast DSL compliant header.

7. The device of claim 3 , where the first bit includes a bit within a timestamp field of the header.

8. The device of claim 1 , where the coding circuitry is configured to change the first bit by advancing a value of a field of the first data unit to a next value within a predetermined sequence.

9. The device of claim 1 , where the first bit includes a bit within a data payload of the first data unit.

10. The device of claim 9 , where the first bit includes a bit within an initial half of the data payload sent to the modulation circuitry.

11. The device of claim 9 , where the coding circuitry is configured to send the data payload to the modulation circuitry ahead of a header of the first data unit.

12. A method including:

receiving an indication of an error in a first data unit, the first data unit including:

a first bit; and

a second bit, where a modulation pattern used to represent the second bit is determined responsive to the first bit;

responsive to the indication, determining to retransmit the first data unit; and

altering the first data unit to generate a retransmission data unit by changing the first bit to alter the modulation pattern used to represent the second bit.

13. The method of claim 12 , further including sending the retransmission data unit to modulation circuitry by sending the first bit ahead of the second bit.

14. The method of claim 12 , where the first bit includes a bit within a header of the first data unit.

15. The method of claim 14 , where the second bit includes a bit within a data payload of the first data unit.

16. The method of claim 14 , where the first bit includes a bit within a timestamp field of the header.

17. The method of claim 12 , where changing the first bit includes advancing a value of a field of the first data unit to a next value within a predetermined sequence.

18. A modem including:

modulation circuitry configured to:

couple to a transmission medium;

apply an inverse discrete Fourier transform (iDFT) to a portion of first data transmission unit (DTU) including a first header and a data payload portion to generate a first modulation pattern representing the data payload portion during transmission over the transmission medium;

apply the iDFT to a portion of a retransmission DTU including a second header and the data payload portion to generate a second modulation pattern representing the data payload portion during transmission over the transmission medium, the second modulation pattern different from the first;

coding circuitry coupled to the modulation circuitry, the coding circuitry configured to:

send the portion of the first DTU to the modulation circuitry for transmission over the transmission medium;

receive, in response to the portion of the first DTU, a retransmission request;

responsive to the retransmission request determining to retransmit the portion of the first DTU;

advance a field of the first header to a next value in a pre-determined sequence to generate the second header;

generate the portion of the retransmission DTU with the second header such that the modulation circuitry represents the data payload portion using the second modulation pattern instead of the first modulation pattern when the iDFT is applied to the portion of the retransmission DTU; and

send the portion of the retransmission DTU to the modulation circuitry for transmission over the transmission medium.

19. The modem of claim 18 , where:

The first header includes a Gfast Digital Subscriber Line (DSL) compliant header;

the field includes two reserved auxiliary bits within the Gfast DSL compliant header; and

the pre-determined sequence includes a sequence of four bitwise values of the two reserved auxiliary bits.

20. The modem of claim 18 , where the modulation circuitry is configured to:

apply the iDFT to the portion of the first DTU by first adding a cyclic redundancy check, applying scrambling, adding Reed-Solomon redundancy, interleaving, applying trellis coding, or any combination thereof; and

apply the iDFT to the portion of the retransmission DTU by first adding a cyclic redundancy check, applying scrambling, adding Reed-Solomon redundancy, interleaving, applying trellis coding, or any combination thereof.