IP Library Granted Patent US 9,967,489
Granted Patent B2
US 9,967,489 · App. 15/287,568 · Granted May 8, 2018

Image pixels with in-column comparators

Inventor: Hai Yan (San Ramon, CA)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N5/3698H01L27/14614H01L27/14638H01L27/14643H04N5/378H04N5/3742
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Quick Facts
Patent No.
US 9,967,489
App. No.
15/287,568
Granted
May 8, 2018
Kind
B2
Abstract

Image sensors may include imaging pixels that have comparators to read out image pixel signals. An imaging pixel may include a photodiode, a floating diffusion region, and a transfer transistor that transfers charge from the photodiode to the floating diffusion region. The floating diffusion region may be coupled to a source follower transistor. The source follower transistor may be coupled to a current source. A row select transistor may be interposed between the source follower transistor and the current source. To form an in-column comparator stage and reduce power consumption, an additional transistor may be interposed between the row select transistor and the current source. The additional transistor may be a pMOS transistor and the source follower transistor may be an nMOS transistor. The additional transistor may have a gate that receives a searching voltage that is ramped from a maximum value to a minimum value.

Claims (43)

1. An imaging pixel comprising:

a photodiode;

a current source;

a source follower transistor that is coupled to the current source;

a row select transistor that is interposed between the source follower transistor and the current source; and

an additional transistor that is interposed between the row select transistor and the current source, wherein the additional transistor has a gate that receives a searching voltage and wherein the searching voltage is ramped from a maximum value to a minimum value using a step-by-step algorithm.

2. The imaging pixel defined in claim 1 , further comprising:

a floating diffusion region, wherein the floating diffusion region is coupled to the gate of the source follower transistor and wherein the floating diffusion region is coupled to a bias voltage supply line by a reset transistor; and

a transfer transistor that is configured to transfer charge from the photodiode to the floating diffusion region.

3. The imaging pixel defined in claim 1 , wherein the source follower transistor is an nMOS transistor and the additional transistor is a pMOS transistor.

4. The imaging pixel defined in claim 1 , wherein the source follower transistor is a pMOS transistor and the additional transistor is an nMOS transistor.

5. The imaging pixel defined in claim 1 , wherein the additional transistor forms an in-column comparator stage that has an in-column comparator output.

6. The imaging pixel defined in claim 5 , further comprising a comparator that has first and second inputs, wherein the in-column comparator output is supplied to the first input and a reference voltage is supplied to the second input.

7. The imaging pixel defined in claim 5 , further comprising a digital buffer that receives the in-column comparator output.

8. The imaging pixel defined in claim 5 , further comprising a clamping circuit, wherein the clamping circuit is coupled to a node that is interposed between the additional transistor and the in-column comparator output.

9. The imaging pixel defined in claim 8 , wherein the clamping circuit comprises an nMOS transistor and wherein the additional transistor is a pMOS transistor.

10. The imaging pixel defined in claim 1 , wherein the additional transistor has a bulk that is coupled to a node between the additional transistor and the row select transistor.

11. The imaging pixel defined in claim 1 , further comprising a cascade transistor interposed between the additional transistor and the current source.

12. The imaging pixel defined in claim 1 , wherein the additional transistor is coupled between a first node that is interposed directly between the row select transistor and the additional transistor and a second node that is interposed directly between the current source and the additional transistor.

13. An imaging pixel comprising:

a photodiode;

a floating diffusion region;

a current source;

a source follower transistor that is coupled to the current source and to the floating diffusion region, wherein the source follower transistor is a transistor of a first type;

a row select transistor that is interposed between the source follower transistor and the current source; and

an additional transistor that is interposed between the row select transistor and the current source, wherein the additional transistor is a transistor of a second type that is the opposite of the first type and wherein the additional transistor serves as a first stage in a comparator used for readout.

14. The imaging pixel defined in claim 13 , wherein the first type of transistor is an nMOS transistor and wherein the second type of transistor is a pMOS transistor.

15. The imaging pixel defined in claim 13 , wherein an output from the first stage is coupled to an input in an additional stage in the comparator.

16. The imaging pixel defined in claim 13 , wherein an output from the first stage is coupled to a digital buffer.

17. An imaging pixel comprising:

a photodiode;

a floating diffusion region;

a current source;

a source follower transistor that is coupled to the current source, wherein the floating diffusion region is coupled to a gate of the source follower transistor and wherein the source follower transistor is an nMOS transistor;

a row select transistor that is interposed between the source follower transistor and the current source; and

an additional transistor that is interposed between the row select transistor and the current source, wherein the additional transistor is a pMOS transistor, wherein the additional transistor serves as a first stage in a comparator used for readout, and wherein the additional transistor has a gate that receives a searching voltage.

18. The imaging pixel defined in claim 17 , wherein an output from the first stage is coupled to an input in an additional stage in the comparator.

19. An imaging pixel comprising:

a photodiode;

a current source;

a source follower transistor that is coupled to the current source;

a row select transistor that is interposed between the source follower transistor and the current source; and

an additional transistor that is interposed between the row select transistor and the current source, wherein the additional transistor has a gate that receives a searching voltage, wherein the source follower transistor is a transistor of a first type, and wherein the additional transistor is a transistor of a second type that is the opposite of the first type.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2016
From: YAN, HAI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 039961/0877 →
Continuity (1)
Related Publication 20180103222A1 · Apr 12, 2018