IP Library Granted Patent US 9,966,975
Granted Patent B2
US 9,966,975 · App. 15/287,658 · Granted May 8, 2018

Iterative decoding scheme of concatenated LDPC and BCH codes for optical transport network

Inventors: Shaoliang Zhang (Princeton, NJ); Fatih Yaman (Monmouth Junction, NJ); Wei Zhou (Princeton, NJ)
Assignee: NEC Corporation
H03M13/2792H03M13/2906H03M13/3746H04B10/58H04B10/60H04L1/0041H04L1/0045H04L1/0058H04L1/0064H03M13/1128H03M13/152
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Quick Facts
Patent No.
US 9,966,975
App. No.
15/287,658
Granted
May 8, 2018
Kind
B2
Abstract

Systems and methods are disclosed for optically communicating data by, at a transmitter side, encoding a block of input bits by one or more outer encoders, and after interleaving the encoded bits, permuting the encoded bits according to a predetermined sequence or order, and further encoding the encoded bits by an inner encoder, and at a receiver side, decoding received bits with an inner decoder, and after the encoded bits are permuted, subsequently decoding by and outer decoder, and returning information bits at an outer decoder as an output. The soft-decision and hard-decision outputs from the outer BCH code help the inner LDPC decoder to have better estimation of the received bits and gain performance. The performance in higher-order modulation formats could be as large as 0.5 dB in one embodiment.

Claims (63)

1. A method for optically communicating data, comprising:

at a transmitter side, encoding a block of input bits by one or more outer encoders, and after interleaving the encoded bits, rearranging the encoded bits according to a predetermined sequence or order, and further encoding the encoded bits by an inner encoder; and

at a receiver side, decoding received bits with an inner decoder, and after the encoded bits are permuted, subsequently decoding by and outer decoder, and returning information bits at an outer decoder as an output;

generating soft-decision and hard-decision outputs from an outer BCH code;

generating an estimation of received bits and gain performance with an inner low-density parity-check (LDPC) decoder wherein the receiver side decodes the received codeword by an LDPC inner code decoder and at a first iteration, the LDPC inner decoder is fed channel log-likelihood-ratio (LLR) information; and

performing concatenated coding with inner and outer codes with iterative decoding between the inner soft-decision and outer hard-decision codes.

2. The method of claim 1 , comprising iteratively decoding soft information propagated between an inner LDPC and an outer Bose-Chaudhuri-Hocquenghem (BCH) codes.

3. The method of claim 1 , comprising iteratively decoding using a soft-input BCH decoder with at least 0.2 dB gain compared to a hard-input BCH decoder.

4. The method of claim 1 , comprising determining a posterior LLR, L(j) at an output of LDPC decoder as a sum of channel LLR L c (j) and extrinsic LLR L e,ldpc (j).

5. The method of claim 4 , wherein the BCH decoder comprises a Chase-2 decoder.

6. An optical communication system, comprising:

a transmitter for encoding a block of input bits by one or more outer encoders, and after interleaving the encoded bits, permuting the encoded bits according to a predetermined sequence or order, and further encoding the encoded bits by an inner encoder; and

a receiver for decoding received bits with an inner decoder, and after the encoded bits are permuted, subsequently decoding by and outer decoder, and returning information bits at an outer decoder as an output,

wherein soft-decision and hard-decision outputs are generated from an outer Bose-Chaudhuri-Hocquenghem (BCH) code and an estimation of received bits and gain performance is generated with an inner low-density parity-check (LDPC) decoder; and

concatenated coding is performed with inner and outer codes by iteratively decoding between the inner soft-decision and outer hard-decision codes wherein the receiver side decodes the received codeword by an LDPC inner code decoder and at a first iteration, the LDPC inner decoder is fed channel log-likelihood-ratio (LLR) information.

7. The method of claim 6 , wherein the decoder comprises a BCH Chase-2 decoder, comprising determining τ least bits among L(j), and adding combinations of zeros and ones to z, in positions corresponding to least unreliable bits.

8. The method of claim 6 , wherein the BCH Chase-2 decoder generates only hard-decision output {circumflex over (z)} j , comprising performing feedback extrinsic information to the LDPC decoder by converting the hard output bit {circumflex over (z)} j is converted to the soft information L e (j) by

L

e

(

j

)

=

2

(

1

-

2

)

σ

2

,

where σ 2 is a variance of noise.

9. The method of claim 6 , comprising generating a priori information for the LDPC decoder in a second iteration and beyond are updated by summing coded bits corresponding to the information bits of BCH codes as L e,ldpc (j)+L e (j), and generating rest bits including redundant bits of LDPC code and BCH code as L e,ldpc (j).

10. The system of claim 6 , wherein the inner encoder pads zero-bit if the number of coded bits of an outer code is less than the information bits of an inner code.

11. The system of claim 6 , wherein the receiver iteratively decodes soft information propagated between an inner LDPC and an outer BCH codes.

12. The system of claim 6 , comprising performing two-dimensional encoding and decoding of LDPC and BCH concatenated codes.

13. The system of claim 6 , wherein the receiver comprises a soft-input BCH decoder with at least 0.2 dB gain compared to a hard-input BCH decoder.

14. The system of claim 13 , wherein the BCH decoder comprises a Chase-2 decoder.

15. The system of claim 6 , wherein the BCH Chase-2 decoder generates only hard-decision output {circumflex over (z)} j , comprising performing feedback extrinsic information to the LDPC decoder by converting the hard output bit {circumflex over (z)} j is converted to the soft information L e (j) by

L

e

(

j

)

=

2

(

1

-

2

)

σ

2

,

where σ 2 is a variance of noise.

16. The system of claim 6 , wherein a priori information is generated for the LDPC decoder in a second iteration and beyond are updated by summing coded bits corresponding to the information bits of BCH codes as L e,ldpc (j)+L e (j), and generating rest bits including redundant bits of LDPC code and BCH code as L e,ldpc (j).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2018
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 045409/0560 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2016
From: ZHANG, SHAOLIANG; YAMAN, FATIH; ZHOU, WEI
To: NEC LABORATORIES AMERICA, INC.
Reel/Frame 039962/0276 →
Continuity (2)
Provisional Application 62240047 · Oct 12, 2015
Related Publication 20170104496A1 · Apr 13, 2017