Method and system for driving an active matrix display circuit

1. A display system, the system comprising:

a pixel circuit for being driven to emit light according to programming information during an emission cycle, the pixel circuit comprising:

a light emitting device for emitting light during the emission cycle,

a drive transistor for conveying a drive current through the light emitting device during the emission cycle, said drive transistor having first, second, and gate terminals, a first terminal of said drive transistor coupled to said light-emitting device, and

a regulating transistor for conveying a leakage current to the gate terminal of the drive transistor while operating in a sub-threshold regime during the emission cycle, thereby adjusting a gate voltage of the drive transistor during the emission cycle, said regulating transistor having first, second, and gate terminals,

the first terminal of said regulating transistor being coupled to said gate terminal of said drive transistor,

the second terminal of said regulating transistor being coupled via a first conductive path to a node between said light emitting device and said drive transistor, the conductive path not including the drive transistor and not including the light emitting device, and

the gate terminal of said regulating transistor being coupled via a second conductive path to one of the first and the second terminals of the regulating transistor for operating the regulating transistor in said sub-threshold regime, the second conductive path not including the light emitting device and not including a capacitor.

2. The system according to claim 1 , wherein the first conductive path further comprises:

a first controllable transistor, said second terminal of said regulating transistor being coupled via said first controllable transistor to said node between said light emitting device and said drive transistor,

wherein the gate terminal of said regulating transistor is coupled via the second conductive path to the second terminal of the regulating transistor.

3. The system according to claim 2 , wherein the pixel circuit further comprises:

a storage capacitor for being charged with a voltage based at least in part on the programming information during a programming cycle, said storage capacitor having first and second terminals, said first terminal of the storage capacitor being coupled to the gate terminal of the drive transistor, said second terminal of said storage capacitor being coupled to the gate terminal of said regulating transistor.

4. The system according to claim 1 , wherein the second conductive path comprises at least a second controllable transistor and wherein the regulating transistor is biased in sub-threshold regime by controllably turning on the second controllable transistor.

5. The system according to claim 4 , wherein the pixel circuit further comprises:

a storage capacitor for being charged with a voltage based at least in part on the programming information during a programming cycle, said storage capacitor having first and second terminals, said first terminal of the storage capacitor being coupled to the gate terminal of the drive transistor,

wherein the gate terminal of said regulating transistor is coupled via the second conductive path to the first terminal of the regulating transistor, and

wherein the second controllable transistor has first, second, and gate terminals, the first terminal of the second controllable transistor coupled to the gate terminal of the drive transistor and the second terminal of the second controllable transistor coupled to the first terminal of the regulating transistor.

6. The system according to claim 5 , wherein said controllably turning on the second controllable transistor forces the regulating transistor into a linear regime of operation.

7. The system according to claim 6 , wherein the pixel circuit further comprises:

a switch transistor having first, second, and gate terminals, the first terminal of the switch transistor coupled to the gate terminal of the drive transistor, the second terminal and the gate terminal of the switch transistor both coupled to one of the first terminal of the regulating transistor and the first conductive path.

8. A method of operating a display having a pixel circuit for driving a light emitting device, the method comprising:

conveying by a drive transistor, a drive current through the light emitting device to emit light during an emission cycle, said drive transistor having first, second, and gate terminals, a first terminal of said drive transistor coupled to said light-emitting device, and

conveying, during the emission cycle, a leakage current by a regulating transistor having first, second, and gate terminals, between the gate terminal of the drive transistor and a node between said light emitting device and said drive transistor while operating the regulating transistor in a sub-threshold regime, the first terminal of said regulating transistor being coupled to said gate terminal of said drive transistor, the second terminal of said regulating transistor being coupled via a first conductive path to the node, the conductive path not including the drive transistor and not including the light emitting device, and the gate terminal of said regulating transistor being coupled via a second conductive path to one of the first and the second terminals of the regulating transistor for operating the regulating transistor in said sub-threshold regime, the second conductive path not including the light emitting device and not including a capacitor.

9. The method according to claim 8 , wherein the regulating transistor is biased in sub-threshold regime by controllably turning on a first controllable transistor along the second conductive path.

10. The method according to claim 9 , wherein controllably turning on the first controllable transistor forces the regulating transistor into a linear regime of operation.

11. The method according to claim 8 , further comprising:

detecting energy transfer from the pixel circuit by a sensor.

12. The method according to claim 11 , wherein the regulating transistor discharges the voltage at the node according to a conductance of the sensor.

13. The method according to claim 8 , wherein conveying a leakage current between the gate terminal of the drive transistor and the node adjusts a voltage of at least one of the gate terminal of the drive transistor and the node.

14. The method according to claim 8 , further comprising:

controlling by a second controllable transistor along the first conductive path, at least one of a time said regulating transistor is active and a current of said regulating transistor.