FINE GRAIN RECONFIGURABLE BUILDING BLOCK FOR IC PROTECTION AND OBFUSCATION
A reconfigurable logic cell may implement either a NAND function or a NOR function based on the state of a selection bit. A reconfiguration tool modifies an integrated circuit design description to include reconfigurable logic cells, a key management unit, and a physically unclonable function. The modified design description is obfuscated to all except for those that know the correct selection bits to apply to the reconfigurable logic cells.
1 . A reconfigurable logic block comprising:
a plurality of cells, wherein each of the plurality of cells conditionally implements a NAND function or a NOR function, each of the plurality of cells comprising a selection mechanism coupled to select the NAND function or the NOR function, wherein the plurality of cells are arranged in a manner such that the selection mechanism configures the reconfigurable logic block to implement either a sum of products or a product of sums.
2 . The reconfigurable logic block of claim 1 wherein the selection mechanism in each of the plurality of cells is coupled to be responsive to a common selection signal.
3 . The reconfigurable logic block of claim 1 wherein each of the plurality of cells comprises a NAND gate in parallel with a NOR gate.
4 . The reconfigurable logic block of claim 3 wherein the NAND gate and the NOR gate comprise NMOS transistors.
5 . The reconfigurable logic block of claim 3 wherein the NAND gate and the NOR gate comprise PMOS transistors.
6 - 18 . (canceled)