IP Library Granted Patent US 10,002,895
Granted Patent B2
US 10,002,895 · App. 15/294,191 · Granted Jun 19, 2018

Apparatus and methods for buried channel transfer gate

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Quick Facts
Patent No.
US 10,002,895
App. No.
15/294,191
Granted
Jun 19, 2018
Kind
B2
Abstract

An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. A buried channel may be formed under the transfer gate. The buried channel may extend from the floating diffusion to overlap a portion of the transfer gate without extending completely beneath the transfer gate or reaching the photodiode. The buried channel may provide a path for antiblooming current from the photodiode to reach the floating diffusion, while allowing for the transfer gate off voltage to remain high enough to prevent transfer gate dark current from flowing into the photodiode.

Claims (17)

1. An image sensor pixel formed on a semiconductor substrate, the image sensor pixel comprising:

a photodetector that generates charge in response to incident light;

a floating diffusion;

a transfer gate that transfers the charge generated by the photodetector to the floating diffusion; and

a buried channel region formed in the semiconductor substrate, wherein the buried channel region is coupled to and extends from the floating diffusion, wherein the buried channel region only partially overlaps the transfer gate, wherein the buried channel region comprises first and second buried channel region portions separated by a gap, wherein the first buried channel region portion extends from the photodetector and only partially overlaps the transfer gate, and wherein the second buried channel region portion extends from the floating diffusion and only partially overlaps the transfer gate.

2. The image sensor pixel defined in claim 1 , wherein the second buried channel region portion extends only partially beneath the transfer gate and does not extend to the photodetector.

3. The image sensor pixel defined in claim 2 , wherein a portion of the semiconductor substrate in the gap separates the first buried channel region portion from the second buried channel region portion.

4. The image sensor pixel defined in claim 1 , wherein a first portion of the transfer gate overlaps the first buried channel region portion, and wherein a second portion of the transfer gate does not overlap the first buried channel region portion.

5. The image sensor pixel defined in claim 1 , wherein at least some of the generated charge comprises blooming current, and wherein the buried channel region is configured to couple the blooming current from the photodetector to the floating diffusion without turning on the transfer gate.

6. The image sensor pixel defined in claim 5 , wherein the buried channel region couples the blooming current from the photodetector to the floating diffusion without coupling dark current from the transfer gate into the photodetector.

7. The image sensor pixel defined in claim 1 , further comprising:

a buried P-type implant formed in the semiconductor substrate beneath the buried channel region.

8. The image sensor pixel defined in claim 1 , further comprising:

first and second buried P-type implants formed in the semiconductor substrate beneath the first and second buried channel region portions, wherein the first and second buried P-type implants are separated by the gap.

9. The image sensor pixel defined in claim 1 , wherein the first buried channel region portion extends completely through the photodetector.

10. The image sensor pixel defined in claim 9 , further comprising:

a buried P-type implant formed in the semiconductor substrate beneath the first and second buried channel region portions, wherein the buried P-type implant extends beneath the gap.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2016
From: TEKLEAB, DANIEL; RAHMAN, MUHAMMAD MAKSUDUR; STEVENS, ERIC GORDON; BANACHOWICZ, BARTOSZ PIOTR; GUIDASH, ROBERT MICHAEL; KOROBOV, VLADIMIR
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 040338/0158 →