Preamble detection and frequency offset determination

1. An apparatus comprising:

a circuit configured to detect a preamble within a signal, including:

divide the signal into preamble detection windows of a selected size;

sample the signal a selected number of times within each preamble detection window;

determine an error value for each preamble detection window based on values of the samples for each preamble detection window; and

determine the preamble is detected when a selected proportion of most-recently sampled preamble detection windows have error values below a threshold value.

2. The apparatus of claim 1 , comprising the circuit further configured to:

modulate a sampling frequency for the signal, including:

determine selected samples from preamble detection windows having error values below the threshold value;

calculate phase estimates representing a phase at which groups of the selected samples were sampled;

determine a frequency offset based on the phase estimates; and

modulate the sampling frequency according to the frequency offset.

3. The apparatus of claim 2 further comprising the selected samples are consecutive samples from the most-recently sampled preamble detection windows.

4. The apparatus of claim 2 comprising the circuit further configured to:

determine a phase estimate for each group of selected samples;

compare the phase estimates for consecutive groups; and

determine the frequency offset based on the results of the comparisons of the phase estimates of the consecutive groups.

5. The apparatus of claim 4 comprising the circuit further configured to:

compare the phase estimates for the consecutive groups by determining a difference between the phase estimates for the consecutive groups; and

determine the frequency offset based on a summation of the differences between the phase estimates for the consecutive groups.

6. The apparatus of claim 5 comprising the circuit further configured to:

perform a phase unwrapping operation on the differences between the phase estimates to obtain an unwrapped phase difference;

determine the frequency offset based on a summation of the unwrapped phase differences and

modulate the sampling frequency using an interpolation filter applied to a clock signal.

7. The apparatus of claim 2 further comprising:

the circuit includes:

an analog to digital converter (ADC) configured to sample the signal at the sampling frequency based on a clock signal;

a preamble detection module configured to:

determine the error value for each preamble detection window;

determine whether the preamble is detected based on the error values of each preamble detection window;

calculate the phase estimates;

determine the frequency offset;

modulate the sampling frequency via a clock signal generator; and

the clock signal generator configured to provide the clock signal to the ADC.

8. The apparatus of claim 1 comprising the circuit further configured to:

sample the signal a first number of times during approximately a single period of the signal;

sample a second number of periods during each preamble detection window, so that the selected number of times the signal is sampled during each preamble detection window is the first number multiplied by the second number; and

determine the error value for each preamble detection window based on an expected signal pattern of the preamble.

9. An apparatus comprising:

a circuit configured to modulate a sampling frequency for a signal, including:

sample the signal to obtain sample values corresponding to a selected signal pattern;

organize the sample values into groups based on detection windows in which the sample values were obtained, a detection window representing a selected number of samples obtainable in a set number of periods of the selected signal pattern;

calculate phase estimates representing a phase at which the groups were sampled;

determine a frequency offset based on the phase estimates; and

modulate the sampling frequency according to the frequency offset.

10. The apparatus of claim 9 comprising the circuit further configured to detect the selected signal pattern within the signal, including:

determine an error value for each detection window based on the sample values for each detection window; and

determine the selected signal pattern is detected when a threshold proportion of most-recently sampled detection windows have error values below a threshold value.

11. The apparatus of claim 10 comprising the circuit further configured to:

determine the error value for each detection window based on a deviation of the sample values from an expected waveform pattern of the selected signal pattern.

12. The apparatus of claim 10 further comprising:

the signal includes a data pattern recorded to a data storage medium;

the selected signal pattern includes a preamble of a sector recorded on the data storage medium;

the circuit includes:

an analog to digital converter (ADC) configured to sample the signal at the sampling frequency based on a clock signal;

a clock signal generator configured to provide the clock signal to the ADC;

a preamble detection module configured to:

determine the error value for each detection window;

determine whether the preamble is detected based on the error values of each detection window;

calculate the phase estimates for sets of sample values;

determine the frequency offset based on the phase estimates; and

modulate the sampling frequency via modifying a rate of the clock signal produced by the clock signal generator.

13. The apparatus of claim 10 comprising the circuit further configured to:

determine the selected signal pattern is detected;

continue determining error values for detection windows after the selected signal pattern is detected to determine when the selected signal pattern is lost;

determine the frequency offset in response to detecting the selected signal pattern;

search for a servo timing mark for a duration of a search window corresponding to a selected number of periods of the selected signal pattern;

extend the search window while the selected signal pattern continues to be detected; and

do not extend the search pattern when the selected signal pattern is no longer detected based on a number of the most-recently sampled detection windows having error values below the threshold value falling below the threshold proportion.

14. The apparatus of claim 9 comprising the circuit further configured to:

calculate a phase estimate for each group of sample values;

determine a difference between the phase estimates for each pair of consecutive groups; and

determine the frequency offset based on a summation of the differences between the phase estimates for each pair of consecutive groups.

15. The apparatus of claim 13 comprising the circuit further configured to:

perform a phase unwrapping operation on the differences between the phase estimates to obtain an unwrapped phase difference; and

determine the frequency offset based on a summation of the unwrapped phase differences.

16. A method comprising:

detecting a selected signal pattern within a signal via a channel circuit, including:

dividing the signal into detection windows of a selected size duration;

sampling the signal a selected number of times within each detection window to obtain sample values;

determining an error value for each detection window based on the sample values for each detection window; and

determining the selected signal pattern is detected when a threshold number of most-recently sampled detection windows have error values below a threshold value.

17. The method of claim 16 further comprising:

modulating a sampling frequency at which sample values are obtained via the channel circuit, including:

determining selected detection windows having error values below the threshold value;

calculating phase estimates representing a phase at which the samples of the selected detection windows were sampled;

determining a frequency offset based on the phase estimates; and

modulating the sampling frequency according to the frequency offset.

18. The method of claim 17 further comprising:

calculating a phase estimate for each selected detection window;

determining a difference between the phase estimates for each pair of consecutive selected detection windows;

performing a phase unwrapping operation on the differences between the phase estimates to obtain an unwrapped phase difference; and

determining the frequency offset based on a summation of the unwrapped phase differences.

19. The method of claim 17 further comprising:

continuing to determine error values for detection windows after the selected signal pattern is detected;

determining the frequency offset in response to detecting the selected signal pattern;

searching for a servo timing mark including a predefined signal pattern while the selected signal pattern is detected;

sampling the signal at the modulated sampling frequency in response to detecting the servo timing mark; and

determining the selected signal pattern is no longer detected in response to the selected detection windows falling below the threshold proportion.

20. The method of claim 16 further comprising:

the detection window includes a number of sample values obtainable during a set number of periods of the expected signal pattern;

determining the error value for each detection window based on:

a deviation of the sample values from expected sample values from an expected signal pattern of the selected signal pattern; and

an amplitude of the signal.