IP Library Granted Patent US 9,954,523
Granted Patent B1
US 9,954,523 · App. 15/296,660 · Granted Apr 24, 2018

Receiver for resonance-coupled signaling

Inventors: Richard Scott Burton (Phoenix, AZ); Karel Ptacek (Roznov pod Radhostem, CZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03K17/691H03K17/6872H04B1/16
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Quick Facts
Patent No.
US 9,954,523
App. No.
15/296,660
Granted
Apr 24, 2018
Kind
B1
Abstract

An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal. A method of receiving a pulse modulated alternating current (AC) signal from a resonantly-coupled signaling path comprises: supplying balanced quiescent currents from a cross-coupled FET pair in a common gate amplifier configuration thereby obtaining an impedance that varies based on an AC signal magnitude; converting the impedance into a response signal; and comparing the response signal to a reference signal to obtain a detection signal representing pulses in the differential AC signal.

Claims (34)

1. An integrated circuit configured for galvanically isolated signaling, the integrated circuit comprising a receiver having:

a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module employing a matched pair of field-effect transistors (FETs) in a differential common-gate amplifier configuration to responsively present an impedance that varies based on a magnitude of the differential signal, wherein each FET of the matched pair has its source conductively coupled to a respective one of the terminals, and has its gate capacitively cross-coupled to an opposite one of the terminals;

a biasing module that converts the detector module impedance to a response signal; and

a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal.

2. The integrated circuit of claim 1 , wherein the transformer secondary has a center tap, and wherein the detector module supplies balanced quiescent currents to the center tap via the terminals.

3. The integrated circuit of claim 2 , further comprising:

a filter module that derives the reference signal from the response signal, the reference signal having a reduced high frequency content relative to the response signal; and

a feedback element that adjusts the balanced quiescent currents based on the reference signal.

4. The integrated circuit of claim 1 , wherein the transformer secondary is electromagnetically coupled to an integrated resonator resonant at a carrier signal frequency for said oscillation.

5. The integrated circuit of claim 1 , wherein the comparator module includes a nonlinear current mirror that amplifies the response signal.

6. The integrated circuit of claim 1 , further comprising a filter module that derives the reference signal from the response signal, the reference signal having a reduced high frequency content relative to the response signal.

7. The integrated circuit of claim 1 , further comprising an amplifier module that converts the detection signal into a digital detection signal.

8. The integrated circuit of claim 7 , further comprising a decoder that derives a transmitted data signal from the digital detection signal, wherein assertions of the digital detection signal represent transitions in the transmitted data signal.

9. A method of equipping an integrated circuit with a receiver for galvanically isolated signals, the method comprising:

coupling a pair of input terminals to sources of a matched pair of field-effect transistors (FETs) in a detector module, the matched pair arranged in a cross-coupled common-gate amplifier configuration to vary an output impedance based on a magnitude of a difference between currents at the input terminals;

biasing the detector module to convert the output impedance into a response signal; and

providing a comparator module configured to compare the response signal to a reference signal to yield a detection signal indicative of a differential oscillation between the currents.

10. The method of claim 9 , further comprising supplying a transformer secondary between the input terminals, the transformer secondary being electromagnetically coupled to a galvanically isolated signaling path to receive a modulated carrier signal.

11. The method of claim 10 , further comprising furnishing the galvanically isolated signaling path with one or more integrated resonators each being resonant at a carrier frequency of the modulated carrier signal.

12. The method of claim 9 , wherein the sources of the matched pair of FETs is conductively coupled to accept a signal from a respective one of the input terminals, and wherein each FET of the matched pair has its gate capacitively cross-coupled to an opposite one of the input terminals.

13. The method of claim 9 , wherein the comparator module includes a nonlinear current mirror to amplify the response signal.

14. The method of claim 9 , further comprising providing a low-pass filter module that derives the reference signal from the response signal.

15. The method of claim 14 , further comprising employing a feedback element to adjust a bias current for the detector module based on the reference signal.

16. The method of claim 15 , wherein the detector module is configured to split the bias current between the input terminals as a balanced quiescent current.

17. A method of receiving a pulse modulated alternating current (AC) signal from a resonantly-coupled signaling path, the method comprising:

supplying balanced quiescent currents to input terminals from a cross-coupled differential pair of field-effect transistors (FETs) in a common gate amplifier configuration, the differential pair exhibiting an impedance that varies based on a magnitude of a differential AC signal between the input terminals;

biasing the differential pair to convert the impedance into a response signal; and

comparing the response signal to a reference signal to obtain a detection signal representing pulses in the differential AC signal.

18. The method of claim 17 , further comprising:

low pass filtering the response signal to obtain the reference signal; and

regulating a differential pair bias current based on the reference signal.

19. The method of claim 17 , further comprising:

amplifying the detection signal to yield a digital detection signal; and

decoding the digital detection signal to replicate a transmitted data signal.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2017
From: BURTON, RICHARD SCOTT; PTACEK, KAREL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 043264/0084 →