IP Library Granted Patent US 10,297,653
Granted Patent B2
US 10,297,653 · App. 15/323,651 · Granted May 21, 2019

Display device, method of manufacturing display device, and electronic apparatus

Inventor: Hitoshi Tsuno (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/3262H01L21/28H01L22/20H01L27/1251H01L27/3276H01L29/41H01L29/786H01L29/788H01L29/78645H01L29/78648H01L21/26513H01L21/28556H01L27/124H01L27/1274H01L2227/323
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Quick Facts
Patent No.
US 10,297,653
App. No.
15/323,651
Granted
May 21, 2019
Kind
B2
Abstract

A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.

Claims (23)

1. A display device comprising:

a substrate;

a plurality of pixels arranged on the substrate, respective ones of the plurality of pixels including an organic electroluminescent element, a first transistor, and a second transistor,

wherein the first transistor includes a first control terminal and a second control terminal, the first control terminal of the first transistor being a part of a first metal layer and the second control terminal of the first transistor being a part of a second metal layer,

the second transistor includes a control terminal, a first source or drain terminal, and a second source or drain terminal, the control terminal of the second transistor being a part of a third metal layer,

the first control terminal of the first transistor is electrically connected to a fourth metal layer via a first contact section,

the first source or drain terminal of the second transistor is electrically connected to the fourth metal layer via a second contact section,

the first metal layer and the fourth metal layer are different layers, and

the second metal layer and the third metal layer are the same layer.

2. The display device according to claim 1 ,

wherein the control terminal of the second transistor is integrated by extending the third metal layer.

3. The display device according to claim 1 , wherein the first transistor is a drive transistor.

4. The display device according to claim 1 , wherein the second transistor is a writing transistor.

5. The display device according to claim 1 , wherein the second control terminal of the first transistor is integrated by extending the second metal layer.

6. The display device according to claim 1 , wherein the second source or drain terminal of the second transistor is electrically connected to a fifth metal layer.

7. The display device according to claim 6 , wherein the fifth metal layer is a signal line.

8. The display device according to claim 1 , wherein a first source or drain terminal of the first transistor is electrically connected to a sixth metal layer.

9. The display device according to claim 8 , wherein the sixth metal layer is a power source line.

10. The display device according to claim 1 , wherein a second source or drain terminal of the first transistor is electrically connected to the organic electroluminescence element.

11. The display device according to claim 1 , wherein the first control terminal of the first transistor and the control terminal of the second transistor are different layers.

12. The display device according to claim 1 , wherein a channel region is provided to face the second control terminal of the first transistor.

13. The display device according to claim 1 , wherein a channel region is provided to face the control terminal of the second transistor.

14. The display device according to claim 1 , wherein the first control terminal of the first transistor is integrated by extending the first metal layer.

Assignments (2)
CHANGE OF NAME Recorded Nov 15, 2021
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 058134/0853 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2017
From: TSUNO, HITOSHI
To: SONY CORPORATION
Reel/Frame 041234/0018 →
Priority Claims (1)
JP 2014-149433 · Jul 23, 2014 · national
Continuity (1)
Related Publication 20170162641A1 · Jun 8, 2017
Cited By (1)
US 12,289,959