IP Library Granted Patent US 10,078,233
Granted Patent B2
US 10,078,233 · App. 15/328,903 · Granted Sep 18, 2018

Optical waveguide resonators

Inventors: Di Liang (Santa Barbara, CA); Geza Kurczveil (Palo Alto, CA); Marco Fiorentino (Mountain View, CA); Raymond G. Beausoleil (Palo Alto, CA)
Assignee: Hewlett Packard Enterprise Development LP
G02F1/025G02B6/29338G02F2001/0152G02F2203/15
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Quick Facts
Patent No.
US 10,078,233
App. No.
15/328,903
Granted
Sep 18, 2018
Kind
B2
Abstract

An example device in accordance with an aspect of the present disclosure includes a first semiconductor layer disposed on a substrate, a dielectric layer disposed between the first semiconductor layer and a second semiconductor layer dissimilar from the first semiconductor layer. A capacitor is formed of at least a portion of the first semiconductor layer, the dielectric layer, and the second semiconductor layer, and is to be included in an optical waveguide resonator.

Claims (31)

1. A device comprising:

a first semiconductor layer disposed on a substrate;

a dielectric layer disposed on the first semiconductor layer;

a second semiconductor layer disposed on the dielectric layer, wherein the second semiconductor layer is dissimilar from the first semiconductor layer;

an optical waveguide resonator disposed in at least one of the first and second semiconductor layers, the optical waveguide resonator including:

an active region disposed in at least one of the first and second semiconductor layers; and

a capacitor disposed in the optical waveguide resonator and formed of at least a portion of the first semiconductor layer, the dielectric layer, and the second semiconductor layer; and

an optical modulator disposed in the first and second semiconductor layers,

wherein the optical modulator is spaced apart from the optical waveguide resonator and is to modulate an output of the optical waveguide resonator.

2. The device of claim 1 , further comprising an isolation trench disposed in at least one of the first and second semiconductor layers, to electrically isolate the capacitor from a corresponding one of the first and second semiconductor layers, in which layer an optical signal of the optical waveguide resonator does not exist.

3. The device of claim 1 , wherein at least one of the optical waveguide resonator and the optical modulator is to be optically coupled to an output waveguide.

4. The device of claim 1 , wherein at least one of i) the optical waveguide resonator and ii) the optical modulator comprises a ring resonator.

5. The device of claim 1 , wherein the optical waveguide resonator and the optical modulator are formed of a same set of 111-V semiconductors of the second semiconductor layer, wherein the optical waveguide resonator and the optical modulator share a similar 111-V layer structure below the active region of the optical waveguide resonator.

6. A method, comprising:

forming a dielectric layer between a first semiconductor layer disposed on a substrate and a second semiconductor layer, wherein the second semiconductor layer is dissimilar from the first semiconductor layer;

forming a capacitor in at least a portion of the first semiconductor layer, the dielectric layer, and the second semiconductor layer;

forming an optical waveguide resonator in at least one of the first and second semiconductor layers, including an active region in at least one of the first and second semiconductor layers, wherein the capacitor is formed in the optical waveguide resonator; and

forming a first contact, a second contact, and a third contact of the optical waveguide resonator, wherein the first and second contacts are to generate an optical signal at the active region, and wherein the third contact is usable to modulate a bias voltage to modulate the optical signal.

7. The method of claim 6 , wherein at least one of the first, second, and third contacts comprises a thermal shunt disposed in a thermal trench, wherein the thermal shunt serves as an electrode in contact with the first semiconductor layer, and wherein the thermal shunt is not in contact with the second semiconductor layer.

8. The method of claim 6 , further comprising forming a doped region of the first semiconductor layer prior to forming the dielectric layer, wherein the doped region is to correspond to the third contact.

9. The method of claim 6 , further comprising forming a thermal trench prior to forming the dielectric layer, and forming a thermal shunt in the thermal trench.

10. A method, comprising:

forming a first semiconductor layer on a substrate;

forming a dielectric layer between the first semiconductor layer and a second semiconductor layer, wherein the second semiconductor layer is dissimilar from the first semiconductor layer;

forming an optical waveguide resonator in at least one of the first and second semiconductor layers, including an active region disposed in at least one of the first and second semiconductor layers, and including a capacitor disposed inside the optical waveguide resonator and formed of at least a portion of the first semiconductor layer, the dielectric layer, and the second semiconductor layer; and

forming an optical modulator in the first and second semiconductor layers, wherein the optical modulator is spaced apart from the optical waveguide resonator and is to modulate an output of the optical waveguide resonator.

11. The method of claim 10 , further comprising forming an output waveguide to be optically coupled to at least one of the optical waveguide resonator and the optical modulator.

12. The method of claim 10 , further comprising forming the optical waveguide resonator and the optical modulator based on a same set of III-V semiconductors of the second semiconductor layer, wherein the optical waveguide resonator and the optical modulator share a similar III-V layer structure below the active region of the optical waveguide resonator.

13. The method of claim 10 , wherein the second semiconductor layer is comprised of a III-V compound semiconductor material, and wherein forming the second semiconductor layer comprises wafer bonding the second semiconductor layer to the dielectric layer.

14. The method of claim 10 , further comprising forming a doped region of the first semiconductor layer prior to forming the dielectric layer.

15. The method of claim 10 , further comprising forming a thermal trench prior to forming the dielectric layer, and forming a thermal shunt in the thermal trench.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2017
From: LIANG, DI; KURCZVEIL, GEZA; FIORENTINO, MARCO; BEAUSOLEIL, RAYMOND G
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 042633/0934 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2017
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 042718/0001 →
Continuity (1)
Related Publication 20170212368A1 · Jul 27, 2017