SEMICONDUCTOR DEVICE STRAIN RELAXATION BUFFER LAYER
A method for forming a semiconductor device comprises forming a first buffer layer with a first melting point on a substrate. A second buffer layer is formed on the first buffer layer. The second buffer layer has a second melting point that is greater than the first melting point. Annealing process is performed that increases a temperature of the first buffer layer such that the first buffer layer partially liquefies and causes a strain in the second buffer layer to be substantially reduced.
1 . A semiconductor device comprising:
a first buffer layer arranged on a substrate, the first buffer layer having a first melting point;
a second buffer layer arranged on the first buffer layer, the second buffer layer having a second melting point, the second melting point greater than the first melting point;
an active region arranged on the second buffer layer; and
a gate stack arranged on the active region.
2 . The device of claim 1 , wherein the second buffer layer is substantially relaxed.
3 . The device of claim 1 , wherein the active region is substantially strained.
4 . The device of claim 1 , wherein the second buffer layer has a thickness greater than a thickness of the first buffer layer.
5 . The device of claim 1 , wherein the first buffer layer is at a thickness within a range of 2 to 10 nanometers and the second buffer layer is at a thickness within a range of 10 to 50 nm.
6 . The device of claim 1 , wherein the first and second buffer layers are epitaxial materials.
7 . The device of claim 1 , wherein the first buffer layer has a first lattice constant and the second buffer layer has a second lattice constant, wherein the second lattice constant is different from the first lattice constant.
8 . The device of claim 1 , wherein the first buffer layer has a melting point less than a melting point of the second buffer layer.
9 . The device of claim 1 , wherein the substrate is silicon, wherein the first buffer layer is germanium and the second buffer layer is SiGe with an atomic concentration of 20% germanium.
10 . The device of claim 3 , wherein the active region comprises crystalline SiGe having a germanium concentration greater than the second buffer layer.
11 . An active region of a semiconductor device, the active region comprising:
a first buffer layer arranged on a substrate, the first buffer layer having a first melting point;
a second buffer layer arranged on the first buffer layer, the second buffer layer having a second melting point, the second melting point greater than the first melting point; and
an active region arranged on the second buffer layer.
12 . The active region of claim 11 , wherein the second buffer layer is substantially relaxed.
13 . The active region of claim 11 , wherein the active region is substantially strained.
14 . The active region of claim 11 , wherein the second buffer layer has a thickness greater than a thickness of the first buffer layer.
15 . The active region of claim 11 , wherein the first buffer layer is at a thickness within a range of 2 to 10 nanometers and the second buffer layer is at a thickness within a range of 10 to 50 nm.
16 . The active region of claim 11 , wherein the first and second buffer layers are epitaxial materials.
17 . The active region of claim 11 , wherein the first buffer layer has a first lattice constant and the second buffer layer has a second lattice constant, wherein the second lattice constant is different from the first lattice constant.
18 . The active region of claim 11 , wherein the first buffer layer has a melting point less than a melting point of the second buffer layer.
19 . The active region of claim 11 , wherein the substrate is silicon, wherein the first buffer layer is germanium and the second buffer layer is SiGe with an atomic concentration of 20% germanium.
20 . The active region of claim 13 , wherein the active region comprises crystalline SiGe having a germanium concentration greater than the second buffer layer.