Method for forming a thin-film transistor
A method of forming a thin-film transistor includes providing a substrate having a top surface and a recess in the top surface. An electrically conductive gate is provided within the recess. A conformal insulating material layer and a conformal semiconductor material layer are formed in the recess, with the semiconductor material layer extending over the top surface of the substrate outside of the recess. Source and drain electrodes are formed by adding a deposition inhibitor material on a portion of the substrate including within the recess; and depositing a thin-film of electrically conductive material, wherein the deposition inhibitor material inhibits the deposition of the electrically conductive material such that the electrically conductive material is patterned by the deposition inhibitor material during deposition, wherein the patterned electrically conductive material provides the source electrode on a first side of the recess and the drain electrode on a second side of the recess.
1. A method of forming a thin-film transistor, comprising:
providing a substrate having a top surface and a recess in the top surface;
providing an electrically conductive gate within the recess;
forming a conformal insulating material layer in the recess;
forming a conformal semiconductor material layer in the recess and extending over the top surface of the substrate outside of the recess;
forming source and drain electrodes by:
adding a deposition inhibitor material on a portion of the substrate including within the recess; and
depositing a thin-film of electrically conductive material, wherein the deposition inhibitor material inhibits the deposition of the electrically conductive material such that the electrically conductive material is patterned by the deposition inhibitor material during deposition;
wherein the patterned electrically conductive material provides the source electrode on a first side of the recess and the drain electrode on a second side of the recess.
2. The method of claim 1 , wherein the step of forming the source and drain electrodes is performed before the step of forming the conformal semiconductor material layer.
3. The method of claim 1 , wherein the step of forming the conformal semiconductor material layer is performed before the step of forming the source and drain electrodes.
4. The method of claim 1 , wherein the step of providing the electrically conductive gate is performed before the step of forming a conformal insulating material layer such that the thin-film transistor is a bottom-gate thin-film transistor.
5. The method of claim 1 , wherein the step of forming a conformal insulating material layer is performed before the step of providing the electrically conductive gate such that the thin-film transistor is a top-gate thin-film transistor.
6. The method of claim 1 , wherein providing the electrically conductive gate includes depositing a conformal thin-film inorganic conductive material.
7. The method of claim 1 , wherein providing the electrically conductive gate includes depositing multiple layers of conductive materials.
8. The method of claim 7 , wherein the multiple layers of conductive materials include a non-conformal conductive material layer and a conformal thin-film inorganic conductive material layer.
9. The method of claim 1 , wherein the step of adding a deposition inhibitor material includes:
applying the deposition inhibitor material to the substrate such that it covers at least a portion of the top surface and fills the recess; and
removing the deposition inhibitor material from a portion of the top surface of the substrate, while leaving the deposition inhibitor material in at least a portion of the recess.
10. The method of claim 9 , wherein the deposition inhibitor material is applied using a lamination process, a coating process or a printing process.
11. The method of claim 9 , wherein removing the deposition inhibitor material includes using a plasma etching process.
12. The method of claim 1 , wherein addition of the deposition inhibitor material into the recesses includes adding a fluid including the deposition inhibitor material within a portion of the recess.
13. The method of claim 12 , wherein the fluid is added in a print pattern using a printing process.
14. The method of claim 13 , wherein the printing process is an inkjet printing process, a flexography printing process, a gravure printing process or a screen printing process.
15. The method of claim 12 , wherein the fluid flows into other portions of the recess by capillary action.
16. The method of claim 1 , wherein deposition inhibitor material is also added onto one or more regions of the top surface of the substrate.
17. The method of claim 1 , wherein the deposition inhibitor material is a polymeric inhibitor.
18. The method of claim 17 , wherein the polymeric inhibitor includes polyvinyl pyrrolidone (PVP) or polymethyl methacrylate (PMMA).
19. The method of claim 1 , wherein the thin-film of electrically conductive material is deposited using an atomic layer deposition process.
20. The method of claim 19 , wherein the atomic layer deposition process includes using a spatial atomic layer deposition process.